Rent's rule based FPGA packing for routability optimization

Authors:
Wenyi Feng;Jonathan Greene;Kristofer Vorwerk;Val Pevzner;Arun Kundu
Affiliations:
Microsemi Corporation, San Jose, CA, USA;Microsemi Corporation, San Jose, CA, USA;Microsemi Corporation, San Jose, CA, USA;Microsemi Corporation, San Jose, CA, USA;Microsemi Corporation, San Jose, CA, USA
Venue:
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
Year:
2014

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Abstract

Packing is a critical step in the CAD flow for cluster-based FPGA architectures, and has a significant impact on the quality of the final placement and routing results. One basic quality metric is routability. Traditionally, minimizing cut (the number of external signals) has been used as the main criterion in packing for routability optimization. This paper shows that minimizing cut is a sub-optimal criterion, and argues to use the Rent characteristic as the new criterion for FPGA packing. We further propose using a recursive bipartitioning-based k-way partitioner to optimize the Rent characteristic during packing. We developed a new packer, PPack2, based on this approach. Compared to T-VPack, PPack2 achieves 35.4%, 35.6%, and 11.2% reduction in wire length, minimal channel width, and critical path delay, respectively. These improvements show that PPack2 outperforms all previous leading packing tools (including iRAC, HDPack, and the original PPack) by a wide margin.