Using cluster-based logic blocks and timing-driven packing to improve FPGA speed and density
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
FPGA routing architecture: segmentation and buffering to optimize speed and density
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
The effect of LUT and cluster size on deep-submicron FPGA performance and density
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
A novel high throughput reconfigurable FPGA architecture
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
Technology mapping for k/m-macrocell based FPGAs
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
Generating highly-routable sparse crossbars for PLDs
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
Automatic generation of FPGA routing architectures from high-level descriptions
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
Timing-driven placement for FPGAs
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
An architecture-driven metric for simultaneous placement and global routing for FPGAs
Proceedings of the 37th Annual Design Automation Conference
A crosstalk-aware timing-driven router for FPGAs
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Using sparse crossbars within LUT
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Detailed routing architectures for embedded programmable logic IP cores
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Mixing buffers and pass transistors in FPGA routing architectures
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Interconnect pipelining in a throughput-intensive FPGA architecture
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
The case for registered routing switches in field programmable gate arrays
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Wiring requirement and three-dimensional integration of field-programmable gate arrays
Proceedings of the 2001 international workshop on System-level interconnect prediction
Interconnect prediction for programmable logic devices
Proceedings of the 2001 international workshop on System-level interconnect prediction
RPack: routability-driven packing for cluster-based FPGAs
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
FPGA switch block layout and evaluation
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
Circuit design of routing switches
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
Efficient circuit clustering for area and power reduction in FPGAs
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
Integrated retiming and placement for field programmable gate arrays
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
EVE: a CAD tool for manual placement and pipelining assistance of FPGA circuits
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
Constrained clock shifting for field programmable gate arrays
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
FPGA test time reduction through a novel interconnect testing scheme
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
SLIP '02 Proceedings of the 2002 international workshop on System-level interconnect prediction
Diagnosis of interconnect faults in cluster-based FPGA architectures
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Interconnect resource-aware placement for hierarchical FPGAs
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Reduction design for generic universal switch blocks
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Efficient circuit clustering for area and power reduction in FPGAs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Analysis of FPGA/FPIC switch modules
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Architectures and algorithms for synthesizable embedded programmable logic cores
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
The stratixπ routing and logic architecture
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Hardware-assisted simulated annealing with application for fast FPGA placement
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Using logic duplication to improve performance in FPGAs
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Design of FPGA interconnect for multilevel metalization
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Automatic transistor and physical design of FPGA tiles from an architectural specification
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Architecture evaluation for power-efficient FPGAs
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Placement rent exponent calculation methods, temporal behaviour and FPGA architecture evaluation
Proceedings of the 2003 international workshop on System-level interconnect prediction
General Models and a Reduction Design Technique for FPGA Switch Box Designs
IEEE Transactions on Computers
Balancing Logic Utilization and Area Efficiency in FPGAs
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
A New Placement Method for Direct Mapping into LUT-Based FPGAs
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Tightly Integrated Placement and Routing for FPGAs
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Placing, Routing, and Editing Virtual FPGAs
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
Analytical Framework for Switch Block Design
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
On Optimum Designs of Universal Switch Blocks
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Automatic Partitioning for Improved Placement and Routing in Complex Programmable Logic Devices
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Modular, Fabric-Specific Synthesis for Programmable Architectures
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Embedded Reconfigurable Logic Core for DSP Applications
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Incremental placement for layout driven optimizations on FPGAs
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Fast timing-driven partitioning-based placement for island style FPGAs
Proceedings of the 40th annual Design Automation Conference
Wiring requirement and three-dimensional integration technology for field programmable gate arrays
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on system-level interconnect prediction (SLIP)
PITIA: an FPGA for throughput-intensive applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
Low-power FPGA using pre-defined dual-Vdd/dual-Vt fabrics
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
Low-power technology mapping for FPGA architectures with dual supply voltages
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
Exploring Logic Block Granularity for Regular Fabrics
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Design automation for mask programmable fabrics
Proceedings of the 41st annual Design Automation Conference
FPGA power reduction using configurable dual-Vdd
Proceedings of the 41st annual Design Automation Conference
Dynamic FPGA routing for just-in-time FPGA compilation
Proceedings of the 41st annual Design Automation Conference
Optimality and Stability Study of Timing-Driven Placement Algorithms
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Heterogeneous Programmable Logic Block Architectures
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
An architecture and compiler for scalable on-chip communication
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Technology mapping and architecture evalution for k/m-macrocell-based FPGAs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Design of FPGA interconnect for multilevel metallization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Unifying mesh- and tree-based programmable interconnect
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
The Stratix II logic and routing architecture
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
HARP: hard-wired routing pattern FPGAs
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Design of programmable interconnect for sublithographic programmable logic arrays
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Efficient static timing analysis and applications using edge masks
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Design, layout and verification of an FPGA using automated tools
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Delay Fault Testing of Look-Up Tables in SRAM-Based FPGAs
Journal of Electronic Testing: Theory and Applications
Fine-grain leakage optimization in SRAM based FPGAs
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
A detailed power model for field-programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Layout techniques for FPGA switch blocks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Architecture-adaptive range limit windowing for simulated annealing FPGA placement
Proceedings of the 42nd annual Design Automation Conference
Leakage efficient chip-level dual-Vdd assignment with time slack allocation for FPGA power reduction
Proceedings of the 42nd annual Design Automation Conference
Logic block clustering of large designs for channel-width constrained FPGAs
Proceedings of the 42nd annual Design Automation Conference
Exploring technology alternatives for nano-scale FPGA interconnects
Proceedings of the 42nd annual Design Automation Conference
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Augmented disjoint switch boxes for FPGAs
WISICT '05 Proceedings of the 4th international symposium on Information and communication technologies
LAP: a logic activity packing methodology for leakage power-tolerant FPGAs
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
Seven Strategies for Tolerating Highly Defective Fabrication
IEEE Design & Test
Nanowire-based programmable architectures
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Analysis and evaluation of a hybrid interconnect structure for FPGAs
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Vdd programmability to reduce FPGA interconnect power
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Simultaneous short-path and long-path timing optimization for FPGAs
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Embedded floating-point units in FPGAs
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
FPGA clock network architecture: flexibility vs. area and power
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
Performance benefits of monolithically stacked 3D-FPGA
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
Armada: timing-driven pipeline-aware routing for FPGAs
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
Difficulty of predicting interconnect delay in a timing driven FPGA CAD flow
Proceedings of the 2006 international workshop on System-level interconnect prediction
Proceedings of the 2006 international workshop on System-level interconnect prediction
Graph matching-based algorithms for array-based FPGA segmentation design and routing
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Routing track duplication with fine-grained power-gating for FPGA interconnect power reduction
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Three-dimensional place and route for FPGAs
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Evaluation of dual VDD fabrics for low power FPGAs
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Crossbar based design schemes for switch boxes and programmable interconnection networks
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Dual-Vt Design of FPGAs for Subthreshold Leakage Tolerance
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Decomposition Design Theory and Methodology for Arbitrary-Shaped Switch Boxes
IEEE Transactions on Computers
FPGA device and architecture evaluation considering process variations
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Hybrid CMOS/nanoelectronic digital circuits: devices, architectures, and design automation
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Analysis and modeling of power grid transmission lines
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Energy-efficient FPGA interconnect design
Proceedings of the conference on Design, automation and test in Europe: Designers' forum
A methodology for FPGA to structured-ASIC synthesis and verification
Proceedings of the conference on Design, automation and test in Europe: Designers' forum
An analytical state dependent leakage power model for FPGAs
Proceedings of the conference on Design, automation and test in Europe: Proceedings
An Efficient BIST Architecture for Delay Faults in the Logic Cells of Symmetrical SRAM-Based FPGAs
Journal of Electronic Testing: Theory and Applications
Area and delay estimation for FPGA implementation of coarse-grained reconfigurable architectures
Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems
Law of large numbers system design
Nano, quantum and molecular computing
Proceedings of the 41st annual Design Automation Conference
Optimal simultaneous mapping and clustering for FPGA delay optimization
Proceedings of the 43rd annual Design Automation Conference
Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction
Proceedings of the 43rd annual Design Automation Conference
An adaptive FPGA architecture with process variation compensation and reduced leakage
Proceedings of the 43rd annual Design Automation Conference
A new hybrid FPGA with nanoscale clusters and CMOS routing
Proceedings of the 43rd annual Design Automation Conference
Transistor abstraction for the functional verification of FPGAs
Proceedings of the 43rd annual Design Automation Conference
Routing architecture optimizations for high-density embedded programmable IP cores
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An efficient chip-level time slack allocation algorithm for Dual-Vdd FPGA power reduction
Proceedings of the 2006 international symposium on Low power electronics and design
Automated design flow for diode-based nanofabrics
ACM Journal on Emerging Technologies in Computing Systems (JETC)
A routing fabric for monolithically stacked 3D-FPGA
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Designing efficient input interconnect blocks for LUT clusters using counting and entropy
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Variation-aware routing for FPGAs
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
GlitchLess: an active glitch minimization technique for FPGAs
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Performance and yield enhancement of FPGAs with within-die variation using multiple configurations
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
An area-efficient timing closure technique for FPGAs using Shannon's expansion
Integration, the VLSI Journal
An asynchronous fpga logic cell implementation
Proceedings of the 17th ACM Great Lakes symposium on VLSI
New timing and routability driven placement algorithms for FPGA synthesis
Proceedings of the 17th ACM Great Lakes symposium on VLSI
The exact channel density and compound design for generic universal switch blocks
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Congestion estimation and localization in fpgas:: a visual tool for interconnect prediction
Proceedings of the 2007 international workshop on System level interconnect prediction
Solving hard instances of FPGA routing with a congestion-optimal restrained-norm path search space
Proceedings of the 2007 international symposium on Physical design
Thermal sensor allocation and placement for reconfigurable systems
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Performances improvement of FPGA using novel multilevel hierarchical interconnection structure
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Mesh of Tree: Unifying Mesh and MFPGA for Better Device Performances
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
Interactive presentation: Statistical dual-Vdd assignment for FPGA interconnect power reduction
Proceedings of the conference on Design, automation and test in Europe
Single-event-upset (SEU) awareness in FPGA routing
Proceedings of the 44th annual Design Automation Conference
Enhancing FPGA performance for arithmetic circuits
Proceedings of the 44th annual Design Automation Conference
DDBDD: delay-driven BDD synthesis for FPGAs
Proceedings of the 44th annual Design Automation Conference
How much can logic perturbation help from netlist to final routing for FPGAs
Proceedings of the 44th annual Design Automation Conference
Prerouted FPGA cores for rapid system construction in a dynamic reconfigurable system
EURASIP Journal on Embedded Systems
An overview of reconfigurable hardware in embedded systems
EURASIP Journal on Embedded Systems
FPGA Design Automation: A Survey
Foundations and Trends in Electronic Design Automation
Evaluating area and performance of hybrid FPGAs with nanoscale clusters and CMOS routing
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Device and architecture concurrent optimization for FPGA transient soft error rate
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Performance and power evaluation of a 3D CMOS/nanomaterial reconfigurable architecture
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Suppression of Intrinsic Delay Variation in FPGAs using Multiple Configurations
ACM Transactions on Reconfigurable Technology and Systems (TRETS) - Special edition on the 15th international symposium on FPGAs
Statistical Analysis and Process Variation-Aware Routing and Skew Assignment for FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS) - Special edition on the 15th international symposium on FPGAs
Designing Efficient Input Interconnect Blocks for LUT Clusters Using Counting and Entropy
ACM Transactions on Reconfigurable Technology and Systems (TRETS) - Special edition on the 15th international symposium on FPGAs
CMOL: Second life for silicon?
Microelectronics Journal
Physical synthesis for FPGA interconnect power reduction by dual-Vdd budgeting and retiming
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
WireMap: FPGA technology mapping for improved routability
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
TORCH: a design tool for routing channel segmentation in FPGAs
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Modeling routing demand for early-stage FPGA architecture development
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Area and delay trade-offs in the circuit and architecture design of FPGAs
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
A novel FPGA logic block for improved arithmetic performance
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
The amorphous FPGA architecture
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Interconnect Driver Design for Long Wires in Field-Programmable Gate Arrays
Journal of Signal Processing Systems
Interconnection lengths and delays estimation for communication links in FPGAs
Proceedings of the 2008 international workshop on System level interconnect prediction
Global interconnections in FPGAs: modeling and performance analysis
Proceedings of the 2008 international workshop on System level interconnect prediction
Placement challenges for structured ASICs
Proceedings of the 2008 international symposium on Physical design
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
An incremental temporal partitioning method for real-time reconfigurable systems
EHAC'06 Proceedings of the 5th WSEAS International Conference on Electronics, Hardware, Wireless and Optical Communications
Improving FPGA routability using network coding
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Criticality history guided FPGA placement algorithm for timing optimization
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Efficient tree topology for FPGA interconnect network
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Placement-and-routing-based register allocation for coarse-grained reconfigurable arrays
Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Applying dynamic reconfiguration for fault tolerance in fine-grained logic arrays
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Architectural modifications to enhance the floating-point performance of FPGAs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
International Journal of Reconfigurable Computing - Regular issue
SCT: A novel approach for testing and configuring nanoscale devices
ACM Journal on Emerging Technologies in Computing Systems (JETC)
An 8x8 run-time reconfigurable FPGA embedded in a SoC
Proceedings of the 45th annual Design Automation Conference
Automated transistor sizing for FPGA architecture exploration
Proceedings of the 45th annual Design Automation Conference
On the trade-off between power and flexibility of FPGA clock networks
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Perturb+mutate: Semisynthetic circuit generation for incremental placement and routing
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
A high-level clustering algorithm targeting dual Vdd FPGAs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Design flow for embedded FPGAs based on a flexible architecture template
Proceedings of the conference on Design, automation and test in Europe
Physical Design of FPGA Interconnect to Prevent Information Leakage
ARC '08 Proceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and Applications
Algorithms and Implementation for Interconnection Graph Problem
COCOA 2008 Proceedings of the 2nd international conference on Combinatorial Optimization and Applications
Design space exploration for field programmable compressor trees
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
Application Domain Specific Embedded FPGAs for Flexible ISA-Extension of ASIPs
Journal of Signal Processing Systems
FPGA Architecture: Survey and Challenges
Foundations and Trends in Electronic Design Automation
Energy and switch area optimizations for FPGA global routing architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Three-dimensional Integrated Circuit Design
Three-dimensional Integrated Circuit Design
Static and Dynamic Memory Footprint Reduction for FPGA Routing Algorithms
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
New non-volatile memory structures for FPGA architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Designing a 3-D FPGA: switch box architecture and thermal issues
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An Efficient Approach for Managing Power Consumption Hotspots Distribution on 3D FPGAs
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Architectural enhancements in Stratix-III™ and Stratix-IV™
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
A comparison of via-programmable gate array logic cell circuits
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
FPCNA: a field programmable carbon nanotube array
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Wirelength modeling for homogeneous and heterogeneous FPGA architectural development
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Diagonal tracks in FPGAs: a performance evaluation
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
A novel minloop SB design to improve FPGA routability
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
High-performance, cost-effective heterogeneous 3D FPGA architectures
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
A delay-optimized universal FPGA routing architecture
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
A routing approach to reduce glitches in low power FPGAs
Proceedings of the 2009 international symposium on Physical design
A design flow for architecture exploration and implementation of partially reconfigurable processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA
IEICE - Transactions on Information and Systems
Towards a framework for designing applications onto hybrid nano/CMOS fabrics
Microelectronics Journal
A Novel Local Interconnect Architecture for Variable Grain Logic Cell
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
High-performance, cost-effective heterogeneous 3D FPGA architectures
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Buffer design and optimization for lut-based structured ASIC design styles
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Field Programmable Compressor Trees: Acceleration of Multi-Input Addition on FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
WireMap: FPGA Technology Mapping for Improved Routability and Enhanced LUT Merging
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Predicting interconnect delay for physical synthesis in a FPGA CAD flow
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Post-placement interconnect entropy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Thermal sensor allocation and placement for reconfigurable systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
An FPGA Logic Cell and Carry Chain Configurable as a 6:2 or 7:2 Compressor
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Improved placement for hierarchical FPGAs exploiting local interconnect resources
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
Design and Tool Flow of Multimedia MPSoC Platforms
Journal of Signal Processing Systems
Discrete cooperative particle swarm optimization for FPGA placement
Applied Soft Computing
Design and synthesis of programmable logic block with mixed LUT and macrogate
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A circuit-software co-design approach for improving EDP in reconfigurable frameworks
Proceedings of the 2009 International Conference on Computer-Aided Design
Discrete and continuous particle swarm optimization for FPGA placement
CEC'09 Proceedings of the Eleventh conference on Congress on Evolutionary Computation
Benchmarking and evaluating reconfigurable architectures targeting the mobile domain
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Design and evaluation of a carbon nanotube-based programmable architecture
International Journal of Parallel Programming
A low-power field-programmable gate array routing fabric
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Programmable logic core enhancements for high-speed on-chip interfaces
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
Variation-aware placement for FPGAs with multi-cycle statistical timing analysis
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
The impact of interconnect architecture on via-programmed structured ASICs (VPSAs)
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
Efficient FPGAs using nanoelectromechanical relays
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
Fine-grained vs. coarse-grained shift-and-add arithmetic in FPGAs (abstract only)
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
DRAM-based FPGA enabled by three-dimensional (3d) memory stacking (abstract only)
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
FPGA interconnect topologies exploration
International Journal of Reconfigurable Computing - Selected papers from ReCoSoc08
Experiencing a problem-based learning approach for teaching reconfigurable architecture design
International Journal of Reconfigurable Computing - Selected papers from ReCoSoc08
A routing approach to reduce glitches in low power FPGAs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Wave-pipelined intra-chip signaling for on-FPGA communications
Integration, the VLSI Journal
Security Primitives for Reconfigurable Hardware-Based Systems
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Designing heterogeneous FPGAs with multiple SBs
ARC'07 Proceedings of the 3rd international conference on Reconfigurable computing: architectures, tools and applications
Evaluating variable-grain logic cells using heterogeneous technology mapping
ARC'07 Proceedings of the 3rd international conference on Reconfigurable computing: architectures, tools and applications
Wirelength-driven force-directed 3D FPGA placement
Proceedings of the 20th symposium on Great lakes symposium on VLSI
A novel routing architecture for field-programmable gate-arrays
ARCS'08 Proceedings of the 21st international conference on Architecture of computing systems
Extrinsic evolvable hardware on the RISA architecture
ICES'07 Proceedings of the 7th international conference on Evolvable systems: from biology to hardware
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
FPGA design for timing yield under process variations
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Improving FPGA performance for carry-save arithmetic
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systems
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
A Variable-Grain Logic Cell and Routing Architecture for a Reconfigurable IP Core
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
FPGA architecture optimisation using geometric programming
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Timing-driven nonuniform depopulation-based clustering
International Journal of Reconfigurable Computing - Special issue on selected papers from spl 2009 programmable logic and applications
A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs
Proceedings of the Conference on Design, Automation and Test in Europe
Performance-driven dual-rail insertion for chip-level pre-fabricated design
Proceedings of the Conference on Design, Automation and Test in Europe
Reconfigurable circuit design with nanomaterials
Proceedings of the Conference on Design, Automation and Test in Europe
Exploring FPGA routing architecture stochastically
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special section on the ACM IEEE international conference on formal methods and models for codesign (MEMOCODE) 2009
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Matrix Nanodevice-Based Logic Architectures and Associated Functional Mapping Method
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Improving FPGA placement with dynamically adaptive stochastic tunneling
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Performance-driven dual-rail routing architecture for structured ASIC design style
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Technology mapping and clustering for FPGA architectures with dual supply voltages
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Variation-aware placement with multi-cycle statistical timing analysis for FPGAs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Enhancing the area efficiency of FPGAs with hard circuits using shadow clusters
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exploring area and delay tradeoffs in FPGAs with architecture and automated transistor design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A 65nm flash-based FPGA fabric optimized for low cost and power
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
Towards scalable FPGA CAD through architecture
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
An analytical model relating FPGA architecture parameters to routability
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
Architecture description and packing for logic blocks with hierarchy, modes and complex interconnect
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
Reducing the pressure on routing resources of FPGAs with generic logic chains
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
A workload-adaptive and reconfigurable bus architecture for multicore processors
International Journal of Reconfigurable Computing
Circuits and architectures for field programmable gate array with configurable supply voltage
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Total power modeling in FPGAs under spatial correlation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A novel FPGA architecture supporting wide shallow memories
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The effect of LUT and cluster size on deep-submicron FPGA performance and density
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2002 international symposium on low-power electronics and design (ISLPED)
Efficient and Deterministic Parallel Placement for FPGAs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
StarPlace: A new analytic method for FPGA placement
Integration, the VLSI Journal
The effect of multi-bit correlation on the design of field-programmable gate array routing resources
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
GlitchLess: dynamic power minimization in FPGAs through edge alignment and glitch filtering
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Application-Specific FPGA using heterogeneous logic blocks
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Effect of serialized routing resources on the implementation area of datapath circuits on FPGAS
WSEAS Transactions on Computers
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A framework for architecture-level exploration of 3-D FPGA platforms
PATMOS'11 Proceedings of the 21st international conference on Integrated circuit and system design: power and timing modeling, optimization, and simulation
mrFPGA: A novel FPGA architecture with memristor-based reconfiguration
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
Ultra-fine grain FPGAs: A granularity study
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
Using OxRRAM memories for improving communications of reconfigurable FPGA architectures
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
Regular 2D NASIC-based architecture and design space exploration
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Choose-your-own-adventure routing: Lightweight load-time defect avoidance
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Scalable don't-care-based logic optimization and resynthesis
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Architecture and operating system support for two-dimensional runtime partial reconfiguration
The Journal of Supercomputing
Run-time generation of partial FPGA configurations
Journal of Systems Architecture: the EUROMICRO Journal
An edge ordering problem of regular hypergraphs
COCOON'06 Proceedings of the 12th annual international conference on Computing and Combinatorics
Application specific FPGA using heterogeneous logic blocks
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
TROUTE: a reconfigurability-aware FPGA router
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
A novel framework for exploring 3-D FPGAs with heterogeneous interconnect fabric
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
On power and fault-tolerance optimization in FPGA physical synthesis
Proceedings of the International Conference on Computer-Aided Design
Architecture and performance evaluation of 3D CMOS-NEM FPGA
Proceedings of the System Level Interconnect Prediction Workshop
The VTR project: architecture and CAD for FPGAs from verilog to routing
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Rethinking FPGAs: elude the flexibility excess of LUTs with and-inverter cones
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
A configurable architecture to limit wakeup current in dynamically-controlled power-gated FPGAs
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Power-aware FPGA technology mapping for programmable-VT architectures (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
FPGA-RR: an enhanced FPGA architecture with RRAM-based reconfigurable interconnects (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Power dissipation impact of the technology mapping synthesis on look-up table architectures
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Towards layout-friendly high-level synthesis
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
Designing alternative FPGA implementations using spatial data from hardware resources
PATMOS'06 Proceedings of the 16th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
MDE-based FPGA physical design: fast model-driven prototyping with Smalltalk
Proceedings of the International Workshop on Smalltalk Technologies
Microprocessors & Microsystems
Statistical Timing and Power Optimization of Architecture and Device for FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Automating reconfiguration chain generation for SRL-Based run-time reconfiguration
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
A routing architecture for FPGAs with Dual-VT switch box and logic clusters
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
A connection router for the dynamic reconfiguration of FPGAs
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
Compiler support for fine-grain software-only checkpointing
CC'12 Proceedings of the 21st international conference on Compiler Construction
Hierarchical Benchmark Circuit Generation for FPGA Architecture Evaluation
ACM Transactions on Embedded Computing Systems (TECS) - Special Section on CAPA'09, Special Section on WHS'09, and Special Section VCPSS' 09
Microprocessors & Microsystems
Reducing expected delay and power in FPGAs using buffer insertion in single-driver wires
Microelectronics Journal
Architectural enhancements in Stratix V™
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
A novel multithread routing method for FPGAs (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
A novel FPGA design framework with VLSI post-routing performance analysis (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
The survivability of design-specific spare placement in FPGA architectures with high defect rates
ACM Transactions on Design Automation of Electronic Systems (TODAES)
On supporting rapid exploration of memory hierarchies onto FPGAs
Journal of Systems Architecture: the EUROMICRO Journal
Performance analysis and optimization of high density tree-based 3d multilevel FPGA
ARC'13 Proceedings of the 9th international conference on Reconfigurable Computing: architectures, tools, and applications
An automatic tool flow for the combined implementation of multi-mode circuits
Proceedings of the Conference on Design, Automation and Test in Europe
Defect tolerance in nanodevice-based programmable interconnects: utilization beyond avoidance
Proceedings of the 50th Annual Design Automation Conference
Optimizing floating point units in hybrid FPGAs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exploring the use of emerging nonvolatile memory technologies in future FPGAs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
JITPR: A framework for supporting fast application's implementation onto FPGAs
ACM Transactions on Reconfigurable Technology and Systems (TRETS) - Special Section on 19th Reconfigurable Architectures Workshop (RAW 2012)
Nano-electro-mechanical relays for FPGA routing: experimental demonstration and a design technique
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Towards development of an analytical model relating FPGA architecture parameters to routability
ACM Transactions on Reconfigurable Technology and Systems (TRETS) - Special Section on 19th Reconfigurable Architectures Workshop (RAW 2012)
Analyzing System-Level Information’s Correlation to FPGA Placement
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Integration of Net-Length Factor with Timing- and Routability-Driven Clustering Algorithms
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Rent's rule based FPGA packing for routability optimization
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
Towards interconnect-adaptive packing for FPGAs
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
A low-cost fault tolerant solution targeting commercial FPGA devices
Journal of Systems Architecture: the EUROMICRO Journal
Exploration and optimization of a homogeneous tree-based application specific inflexible FPGA
Microelectronics Journal
A novel 3-D FPGA architecture targeting communication intensive applications
Journal of Systems Architecture: the EUROMICRO Journal
Impact of dual placement and routing on WDDL netlist security in FPGA
International Journal of Reconfigurable Computing
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From the Publisher:Architecture and CAD for Deep-Submicron FPGAs addresses several key issues in the design of high-performance FPGA architectures and CAD tools, with particular emphasis on issues that are important for FPGAs implemented in deep-submicron processes. Three factors combine to determine the performance of an FPGA: the quality of the CAD tools used to map circuits into the FPGA, the quality of the FPGA architecture, and the electrical (i.e. transistor-level) design of the FPGA. Architecture and CAD for Deep-Submicron FPGAs examines all three of these issues in concert.