An efficient incremental algorithm for solving systems of linear Diophantine equations
Information and Computation
Universal switch modules for FPGA design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Three-Stage One-Sided Rearrangeable Polygonal Switching Network
IEEE Transactions on Computers
Architecture and CAD for Deep-Submicron FPGAs
Architecture and CAD for Deep-Submicron FPGAs
Reduction design for generic universal switch blocks
ACM Transactions on Design Automation of Electronic Systems (TODAES)
General Models and a Reduction Design Technique for FPGA Switch Box Designs
IEEE Transactions on Computers
On optimal hyperuniversal and rearrangeable switch box designs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Given a pair of integers 2≤s ≤k, define gs(k) to be the minimum integer such that, for any regular multiple hypergraph H =({1, ..., k}, {e1, ..., em}) with edge size at most s, there is a permutation π on {1, ..., m} (or edge ordering eπ(1), ..., e$_{\pi({\it m})}$)such that $g(H, \pi) =\max\{ \max \{|d_{H_j}(u) - d_{H_j}(v)| : u, v\in e_{\pi(j+1)}\} : j = 0, \dots, m-1\} \le g_s(k)$, where Hj = ({1, ..., k}, {eπ(1),...,e$_{\pi({\it j})}$}). The so-called edge ordering problem is to determine the value of gs(k) and to find a permutation π such that g(H, π)≤gs(k). This problem was raised from a switch box design problem, where the value of gs(k) can be used to design hyper-universal switch boxes and an edge ordering algorithm leads to a routing algorithm. In this paper, we show that (1) g2(k) = 1 for all k≥3, (2) gs(k) = 1 for 3≤s≤k≤6, and (3) gs(k) ≤2k for all k≥7. We give a heuristic algorithm for the edge ordering and conjecture that there is a constant C such that gs(k) ≤C for all k and s.