Concrete mathematics: a foundation for computer science
Concrete mathematics: a foundation for computer science
Field-programmable gate arrays
Field-programmable gate arrays
Plane parallel a maze router and its application to FPGAs
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Universal logic gate for FPGA design
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
A new global routing algorithm for FPGAs
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
On the NP-completeness of regular 2-D FPGA routing architectures and a novel solution
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Routing in a new 2-dimensional FPGA/FPIC routing architecture
DAC '94 Proceedings of the 31st annual Design Automation Conference
On designing ULM-based FPGA logic modules
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
New performance-driven FPGA routing algorithms
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Switch module design with application to two-dimensional segmentation design
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Routing for symmetric FPGAs and FPICs
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Field-Programmable Gate Array Technology
Field-Programmable Gate Array Technology
Design and analysis of FPGA/FPIC switch modules
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
FPGA global routing based on a new congestion metric
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
Routable Technologie Mapping for LUT FPGAs
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Placement-Based Partitioning for Lookup-Table-Based FPGAs
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
TRACER-fpga: a router for RAM-based FPGA's
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Switch-matrix architecture and routing for FPDs
ISPD '98 Proceedings of the 1998 international symposium on Physical design
FPGA routing architecture: segmentation and buffering to optimize speed and density
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Quasi-Universal Switch Matrices for FPD Design
IEEE Transactions on Computers
Generic Universal Switch Blocks
IEEE Transactions on Computers
Detailed routing architectures for embedded programmable logic IP cores
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Combinatorial routing analysis and design of universal switch blocks
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
On optimum switch box designs for 2-D FPGAs
Proceedings of the 38th annual Design Automation Conference
FPGA switch block layout and evaluation
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
A Three-Stage One-Sided Rearrangeable Polygonal Switching Network
IEEE Transactions on Computers
Comment on Generic Universal Switch Blocks
IEEE Transactions on Computers
General models for optimum arbitrary-dimension FPGA switch box designs
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Reduction design for generic universal switch blocks
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Analysis of FPGA/FPIC switch modules
ACM Transactions on Design Automation of Electronic Systems (TODAES)
General Models and a Reduction Design Technique for FPGA Switch Box Designs
IEEE Transactions on Computers
Analytical Framework for Switch Block Design
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
On Optimum Designs of Universal Switch Blocks
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Proceedings of the 40th annual Design Automation Conference
Design automation for mask programmable fabrics
Proceedings of the 41st annual Design Automation Conference
HARP: hard-wired routing pattern FPGAs
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Analysis of the Effect of LUT Size on FPGA Area and Delay Using Theoretical Derivations
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
A detailed power model for field-programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Layout techniques for FPGA switch blocks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Augmented disjoint switch boxes for FPGAs
WISICT '05 Proceedings of the 4th international symposium on Information and communication technologies
On improving FPGA routability applying multi-level switch boxes
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Crossbar based design schemes for switch boxes and programmable interconnection networks
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Decomposition Design Theory and Methodology for Arbitrary-Shaped Switch Boxes
IEEE Transactions on Computers
A New Reliability-Oriented Place and Route Algorithm for SRAM-Based FPGAs
IEEE Transactions on Computers
Routing architecture optimizations for high-density embedded programmable IP cores
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Designing efficient input interconnect blocks for LUT clusters using counting and entropy
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
The exact channel density and compound design for generic universal switch blocks
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Designing Efficient Input Interconnect Blocks for LUT Clusters Using Counting and Entropy
ACM Transactions on Reconfigurable Technology and Systems (TRETS) - Special edition on the 15th international symposium on FPGAs
FPGA Architecture: Survey and Challenges
Foundations and Trends in Electronic Design Automation
Designing a 3-D FPGA: switch box architecture and thermal issues
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A novel minloop SB design to improve FPGA routability
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
A New Approach for Rearrangeable Multicast Switching Networks
COCOA '09 Proceedings of the 3rd International Conference on Combinatorial Optimization and Applications
Parallel FPGA-based implementation of scatter search
Proceedings of the 12th annual conference on Genetic and evolutionary computation
Performance-driven dual-rail insertion for chip-level pre-fabricated design
Proceedings of the Conference on Design, Automation and Test in Europe
Mitigating soft errors in SRAM-based FPGAs by decoding configuration bits in switch boxes
Microelectronics Journal
The effect of multi-bit correlation on the design of field-programmable gate array routing resources
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An edge ordering problem of regular hypergraphs
COCOON'06 Proceedings of the 12th annual international conference on Computing and Combinatorics
Design automation for reconfigurable interconnection networks
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
FPGA-RR: an enhanced FPGA architecture with RRAM-based reconfigurable interconnects (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Interlaced switch boxes placement for three-dimensional FPGA architecture design
International Journal of Circuit Theory and Applications
| Hi-index | 0.02 |
A switch module M with W terminals on each side is said to be universal if every set of nets satisfying the dimensional constraint (i.e., the number of nets on each side of M is at most W) is simultaneously rout able through M. In this article, we present a class of universal switch modules. Each of our switch modules has 6Wswitches and switch-module flexibility three (i.e, Fs=3). We prove that no switch module with less than 6W switches can be universal. We also compare our switch modules with those used in the Xilinx XC4000 family FPGAs and the antisymmetric switch modules (with FS=3) suggested by Rose and Brown [1991]. Although these two kinds of switch modules also have FS=3 and 6W switches, we show that they are not universal. Based on combinatorial counting techniques, we show that each of our universal switch modules can accommodate up to 25% more routing instances, compared with the XC4000-type switch module of the same size. Experimental results demonstrate that our universal switch modules improve routability at the chip level. Finally, our work also provides a theoretical insight into the important observation by Rose and Brown [1991] (based on extensive experiments) that FS=3 is often sufficient to provide high routability.