Field-programmable gate arrays
Field-programmable gate arrays
Performance-driven interconnect design based on distributed RC delay model
DAC '93 Proceedings of the 30th international Design Automation Conference
A new global routing algorithm for FPGAs
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
On the NP-completeness of regular 2-D FPGA routing architectures and a novel solution
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
An architecture-independent approach to FPGA routing based on multi-weighted graphs
EURO-DAC '94 Proceedings of the conference on European design automation
Routing for symmetric FPGAs and FPICs
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Field-Programmable Gate Array Technology
Field-Programmable Gate Array Technology
Universal switch modules for FPGA design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Universal switch-module design for symmetric-array-based FPGAs
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Proceedings of the 1997 international symposium on Physical design
SAC '98 Proceedings of the 1998 ACM symposium on Applied Computing
A hybrid algorithm for the point to multipoint routing problem
SAC '97 Proceedings of the 1997 ACM symposium on Applied computing
An architecture-driven metric for simultaneous placement and global routing for FPGAs
Proceedings of the 37th Annual Design Automation Conference
Timing-driven routing for symmetrical array-based FPGAs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An accurate evaluation of routing density for symmetrical FPGAs
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
A hybrid genetic algorithm for the point to multipoint routing problem with single split paths
Proceedings of the 2001 ACM symposium on Applied computing
On optimum switch box designs for 2-D FPGAs
Proceedings of the 38th annual Design Automation Conference
General models for optimum arbitrary-dimension FPGA switch box designs
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
A router for symmetrical FPGAs based on exact routing density evaluation
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Minimizing FPGA Interconnect Delays
IEEE Design & Test
General Models and a Reduction Design Technique for FPGA Switch Box Designs
IEEE Transactions on Computers
A Timing-Constrained Incremental Routing Algorithm for Symmetrical FPGAs
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Multi-layer chip-level global routing using an efficient graph-based Steiner tree heuristic
EDTC '97 Proceedings of the 1997 European conference on Design and Test
CeRA: A Router for Symmetrical FPGAs Based on Exact Routing Density Evaluation
IEEE Transactions on Computers
A Min-Cost Flow Based Detailed Router for FPGAs
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
An integrated design flow for a via-configurable gate array
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
On improving FPGA routability applying multi-level switch boxes
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Graph matching-based algorithms for array-based FPGA segmentation design and routing
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
A novel approach to the placement and routing problems for field programmable gate arrays
Applied Soft Computing
Landscape analysis for multicast routing
Computer Communications
Genetic local search for multicast routing with pre-processing by logarithmic simulated annealing
Computers and Operations Research
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Improving FPGA routability using network coding
Proceedings of the 18th ACM Great Lakes symposium on VLSI
Adaptive aggregation tree transformation for energy-efficient query processing in sensor networks
International Journal of Sensor Networks
An enhanced leakage-aware scheduler for dynamically reconfigurable FPGAs
Proceedings of the 16th Asia and South Pacific Design Automation Conference
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