On improving FPGA routability applying multi-level switch boxes

  • Authors:
  • Jiping Liu;Hongbing Fan;Yu-Liang Wu

  • Affiliations:
  • University of Lethbridge, Lethbridge, AB, Canada;University of Victoria, Victoria, BC, Canada;The Chinese University of Hong Kong, Shatin, N. T., Hong Kong

  • Venue:
  • ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
  • Year:
  • 2003

Quantified Score

Hi-index 0.00

Visualization

Abstract

In this paper, we propose a new FPGA switch box design style --- the extended switch boxes. An extended switch box is multi-level in nature. It consists of a kernel and extension(s) connected to the kernel, while many conventional switch boxes only consist of the kernel part and are referred to as single-level switch boxes. We show that with a much reduced total number of manufactured switches in the chip, this new design has a guaranteed complete mappability from any global routing to a feasible detailed routing of the entire FPGA chip. The interesting results seem to open a new avenue for designing FPGA routing structures.