A performance and routablity driven router for FPGAs considering path delays

On two-step routing for FPGAS

Proceedings of the 1997 international symposium on Physical design

An architecture-driven metric for simultaneous placement and global routing for FPGAs

Proceedings of the 37th Annual Design Automation Conference

Timing-driven routing for symmetrical array-based FPGAs

ACM Transactions on Design Automation of Electronic Systems (TODAES)

A comparative study of two Boolean formulations of FPGA detailed routing constraints

Proceedings of the 2001 international symposium on Physical design

On optimum switch box designs for 2-D FPGAs

Proceedings of the 38th annual Design Automation Conference

Timing-driven routing for FPGAs based on Lagrangian relaxation

Proceedings of the 2002 international symposium on Physical design

General models for optimum arbitrary-dimension FPGA switch box designs

Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design

Performance-driven placement for dynamically reconfigurable FPGAs

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Wire type assignment for FPGA routing

FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays

Minimizing FPGA Interconnect Delays

IEEE Design & Test

General Models and a Reduction Design Technique for FPGA Switch Box Designs

IEEE Transactions on Computers

Gambit: A Tool for the Simultaneous Placement and Detailed Routing of Gate-Arrays

FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications

A Comparative Study of Two Boolean Formulations of FPGA Detailed Routing Constraints

IEEE Transactions on Computers

A Min-Cost Flow Based Detailed Router for FPGAs

Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design

Simultaneous short-path and long-path timing optimization for FPGAs

Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design

On improving FPGA routability applying multi-level switch boxes

ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference

Graph matching-based algorithms for array-based FPGA segmentation design and routing

ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference

FPGA Design Automation: A Survey

Foundations and Trends in Electronic Design Automation

Enforcing long-path timing closure for FPGA routing with path searches on clamped lexicographic spirals

Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays