DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Field-programmable gate arrays
Field-programmable gate arrays
Placement and routing tools for the Triptych FPGA
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Universal switch modules for FPGA design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Architectural and physical design challenges for one-million gate FPGAs and beyond
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
On channel segmentation design for row-based FPGAs
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
The design of an SRAM-based field-programmable gate array—part I: architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Field-Programmable Gate Array Technology
Field-Programmable Gate Array Technology
Architecture and CAD for Deep-Submicron FPGAs
Architecture and CAD for Deep-Submicron FPGAs
Minimizing FPGA Interconnect Delays
IEEE Design & Test
How Much Logic Should Go in an FPGA Logic Block?
IEEE Design & Test
VPR: A new packing, placement and routing tool for FPGA research
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
Architectures and algorithms for field-programmable gate arrays with embedded memory
Architectures and algorithms for field-programmable gate arrays with embedded memory
Effect of the prefabricated routing track distribution on FPGA area-efficiency
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Detailed routing architectures for embedded programmable logic IP cores
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Mixing buffers and pass transistors in FPGA routing architectures
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
SLIP '02 Proceedings of the 2002 international workshop on System-level interconnect prediction
Reconfigurable computing: a survey of systems and software
ACM Computing Surveys (CSUR)
The stratixπ routing and logic architecture
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Design of FPGA interconnect for multilevel metalization
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Architecture evaluation for power-efficient FPGAs
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
An architectural exploration of via patterned gate arrays
Proceedings of the 2003 international symposium on Physical design
A Retargetable Macro Generation Method for the Evaluation of Repetitive Configurable Architectures
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Fast timing-driven partitioning-based placement for island style FPGAs
Proceedings of the 40th annual Design Automation Conference
Low-power high-level synthesis for FPGA architectures
Proceedings of the 2003 international symposium on Low power electronics and design
Exploration of pipelined FPGA interconnect structures
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Design of FPGA interconnect for multilevel metallization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
The Stratix II logic and routing architecture
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Design of programmable interconnect for sublithographic programmable logic arrays
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Nanowire-based programmable architectures
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Graph matching-based algorithms for array-based FPGA segmentation design and routing
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
FPGA device and architecture evaluation considering process variations
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
NATURE: a hybrid nanotube/CMOS dynamically reconfigurable architecture
Proceedings of the 43rd annual Design Automation Conference
Routing architecture optimizations for high-density embedded programmable IP cores
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A novel approach to the placement and routing problems for field programmable gate arrays
Applied Soft Computing
TORCH: a design tool for routing channel segmentation in FPGAs
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
The amorphous FPGA architecture
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
FPGA Architecture: Survey and Challenges
Foundations and Trends in Electronic Design Automation
A hybrid nano/CMOS dynamically reconfigurable system—Part I: Architecture
ACM Journal on Emerging Technologies in Computing Systems (JETC)
A low-power field-programmable gate array routing fabric
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Performance-driven dual-rail insertion for chip-level pre-fabricated design
Proceedings of the Conference on Design, Automation and Test in Europe
Exploring FPGA routing architecture stochastically
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special section on the ACM IEEE international conference on formal methods and models for codesign (MEMOCODE) 2009
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The effect of multi-bit correlation on the design of field-programmable gate array routing resources
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Effect of serialized routing resources on the implementation area of datapath circuits on FPGAS
WSEAS Transactions on Computers
BPR: fast FPGA placement and routing using macroblocks
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
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