On channel segmentation design for row-based FPGAs

Switch bound allocation for maximizing routability in timing-driven routing of FPGAs

DAC '94 Proceedings of the 31st annual Design Automation Conference

Architectural and physical design challenges for one-million gate FPGAs and beyond

FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays

Architecture and routability analysis for row-based FPGAs

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

Switch module design with application to two-dimensional segmentation design

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

Graph matching-based algorithms for FPGA segmentation design

Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design

FPGA routing architecture: segmentation and buffering to optimize speed and density

FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays

Efficient routability check algorithms for segmented channel routing

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Graph matching-based algorithms for array-based FPGA segmentation design and routing

ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference