Chortle: a technology mapping program for lookup table-based field programmable gate arrays
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Logic synthesis for programmable gate arrays
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Field-programmable gate arrays
Field-programmable gate arrays
On designing ULM-based FPGA logic modules
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
PathFinder: a negotiation-based performance-driven router for FPGAs
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
Universal switch modules for FPGA design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Using BDDs to design ULMs for FPGAs
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Proceedings of the 1997 international symposium on Physical design
A novel VLSI layout fabric for deep sub-micron applications
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
An Efficient Implementation of Edmonds' Algorithm for Maximum Matching on Graphs
Journal of the ACM (JACM)
FPGA switch block layout and evaluation
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
Architecture and CAD for Deep-Submicron FPGAs
Architecture and CAD for Deep-Submicron FPGAs
An architectural exploration of via patterned gate arrays
Proceedings of the 2003 international symposium on Physical design
Fishbone: a block-level placement and routing scheme
Proceedings of the 2003 international symposium on Physical design
VPR: A new packing, placement and routing tool for FPGA research
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
Track assignment: a desirable intermediate step between global routing and detailed routing
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A hybrid ASIC and FPGA architecture
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Exploring regular fabrics to optimize the performance-cost trade-off
Proceedings of the 40th annual Design Automation Conference
On designing universal logic blocks and their application to FPGA design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A methodology for FPGA to structured-ASIC synthesis and verification
Proceedings of the conference on Design, automation and test in Europe: Designers' forum
Via-configurable routing architectures and fast design mappability estimation for regular fabrics
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Via configurable three-input lookup-tables for structured ASICs
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Power gating design for standard-cell-like structured ASICs
Proceedings of the Conference on Design, Automation and Test in Europe
Selectively patterned masks: structured ASIC with asymptotically ASIC performance
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Rover: routing on via-configurable fabrics for standard-cell-like structured ASICs
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
Area impact analysis of via-configurable regular fabric for digital integrated circuit design
Proceedings of the 24th symposium on Integrated circuits and systems design
Standard cell like via-configurable logic blocks for structured ASIC in an industrial design flow
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Architecture and design flow for a highly efficient structured ASIC
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design and analysis of via-configurable routing fabrics for structured ASICs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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Programmable circuit design has played an important role in improving design productivity over the last few decades. By imposing structure on the design, efficient automation of synthesis, placement and routing is possible. We focus on a class of programmable circuits known as mask programmable circuits. In this paper, we describe key issues in design and tool methodology that need to be addressed in creating a programmable fabric. We construct an efficient design flow that can explore different logic and routing architectures. The main advantage of our work is that we tailor tools designed for standard cell design, that are readily available in the market, to work on a programmable fabric. Our flow requires some additional software capability. A special router that understands programmable routing constructs to complete connections is described. In addition, a tool that packs logic efficiently after synthesis is also presented.