A hybrid ASIC and FPGA architecture

There is life left in ASICs

Proceedings of the 2003 international symposium on Physical design

The A to Z of SoCs

Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design

Designing mega-ASICs in nanogate technologies

Proceedings of the 40th annual Design Automation Conference

Exploring regular fabrics to optimize the performance-cost trade-off

Proceedings of the 40th annual Design Automation Conference

Hybrid BIST for System-on-a-Chip Using an Embedded FPGA Core

VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium

Design automation for mask programmable fabrics

Proceedings of the 41st annual Design Automation Conference

Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources

Proceedings of the 41st annual Design Automation Conference

HARP: hard-wired routing pattern FPGAs

Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays

A Mask Reuse Methodology for Reducing System-on-a-Chip Cost

ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design

Flexible ASIC: shared masking for multiple media processors

Proceedings of the 42nd annual Design Automation Conference

Measuring the gap between FPGAs and ASICs

Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays

Performance benefits of monolithically stacked 3D-FPGA

Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays

Advanced power management techniques: going beyond intelligent shutdown

ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference

FPGA Design Automation: A Survey

Foundations and Trends in Electronic Design Automation

Synchronization through Communication in a Massively Parallel Processor Array

IEEE Micro

A novel FPGA logic block for improved arithmetic performance

Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays

Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs

Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays

Efficient synthesis of compressor trees on FPGAs

Proceedings of the 2008 Asia and South Pacific Design Automation Conference

Hardwired Networks on Chip in FPGAs to Unify Functional and Con?guration Interconnects

NOCS '08 Proceedings of the Second ACM/IEEE International Symposium on Networks-on-Chip

FPGA Architecture: Survey and Challenges

Foundations and Trends in Electronic Design Automation

On the design of reconfigurable multipliers for integer and Galois field multiplication

Microprocessors & Microsystems

Field Programmable Compressor Trees: Acceleration of Multi-Input Addition on FPGAs

ACM Transactions on Reconfigurable Technology and Systems (TRETS)

An FPGA Logic Cell and Carry Chain Configurable as a 6:2 or 7:2 Compressor

ACM Transactions on Reconfigurable Technology and Systems (TRETS)

FPGA based distributed self healing architecture for reusable systems

Cluster Computing

Programmable logic core enhancements for high-speed on-chip interfaces

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Improving FPGA performance for carry-save arithmetic

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Selectively patterned masks: structured ASIC with asymptotically ASIC performance

Proceedings of the 16th Asia and South Pacific Design Automation Conference

Product-term-based synthesizable embedded programmable logic cores

IEEE Transactions on Very Large Scale Integration (VLSI) Systems