The effect of LUT and cluster size on deep-submicron FPGA performance and density
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
Architecture and CAD for Deep-Submicron FPGAs
Architecture and CAD for Deep-Submicron FPGAs
Computer Architecture and Parallel Processing
Computer Architecture and Parallel Processing
Towards Evolvable IP Cores for FPGAs
EH '03 Proceedings of the 2003 NASA/DoD Conference on Evolvable Hardware
FPGA-Based System Design
EH '05 Proceedings of the 2005 NASA/DoD Conference on Evolvable Hardware
POEtic tissue: an integrated architecture for bio-inspired hardware
ICES'03 Proceedings of the 5th international conference on Evolvable systems: from biology to hardware
Virtual reconfigurable circuits for real-world applications of evolvable hardware
ICES'03 Proceedings of the 5th international conference on Evolvable systems: from biology to hardware
The Input Pattern Order Problem: Evolution of Combinatorial and Sequential Circuits in Hardware
ICES '08 Proceedings of the 8th international conference on Evolvable Systems: From Biology to Hardware
A reconfigurable architecture for emulating large-scale bio-inspired systems
CEC'09 Proceedings of the Eleventh conference on Congress on Evolutionary Computation
Challenges of evolvable hardware: past, present and the path to a promising future
Genetic Programming and Evolvable Machines
Optimization of single variable functions using complete hardware evolution
Applied Soft Computing
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The RISA Architecture is a novel reconfigurable hardware platform containing both hardware and software reconfigurable elements. This paper describes the architecture and the features that make it suitable for implementing biologically inspired systems such as the evolution of digital circuits. Some of the architecture's capabilities are demonstrated with the results of evolving a simple combinatorial circuit using one of the fabricated RISA devices.