Placing, Routing, and Editing Virtual FPGAs

  • Authors:
  • Loïc Lagadec;Dominique Lavenier;Erwan Fabiani;Bernard Pottier

  • Affiliations:
  • -;-;-;-

  • Venue:
  • FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
  • Year:
  • 2001

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Abstract

This paper presents the benefits of using a generic FPGA tool set developed at the university of Brest for programming virtual FPGA. From a high level description of the FPGA architecture, the basic tools such a placer, a router or an editor are automatically generated. The description is not constrained by any model, so that abstract architectures, such as virtual FPGAs, can directly exploit the tool set as their basic programming tools.