Introduction to the theory of neural computation
Introduction to the theory of neural computation
Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
Architecture and CAD for Deep-Submicron FPGAs
Architecture and CAD for Deep-Submicron FPGAs
VPR: A new packing, placement and routing tool for FPGA research
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
Design of programmable interconnect for sublithographic programmable logic arrays
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Neuromorphic architectures for nanoelectronic circuits: Research Articles
International Journal of Circuit Theory and Applications - Nanoelectric Circuits
A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
Hybrid CMOS/nanoelectronic digital circuits: devices, architectures, and design automation
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
CMOL crossnets as pattern classifiers
IWANN'05 Proceedings of the 8th international conference on Artificial Neural Networks: computational Intelligence and Bioinspired Systems
NANOARCH '09 Proceedings of the 2009 IEEE/ACM International Symposium on Nanoscale Architectures
Impact of nanomanufacturing flow on systematic yield losses in nanoscale fabrics
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
N3ASICs: Designing nanofabrics with fine-grained CMOS integration
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
Design investigation of nanoelectronic circuits using crossbar-based nanoarchitectures
Microelectronics Journal
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This is a brief review of the recent work on the prospective hybrid CMOS/nanowire/nanodevice (''CMOL'') circuits including digital memories, reconfigurable Boolean-logic circuits, and mixed-signal neuromorphic networks. The basic idea of CMOL circuits is to combine the advantages of CMOS technology (including its flexibility and high fabrication yield) with the extremely high potential density of molecular-scale two-terminal nanodevices. Relatively large critical dimensions of CMOS components and the ''bottom-up'' approach to nanodevice fabrication may keep CMOL fabrication costs at affordable level. At the same time, the density of active devices in CMOL circuits may be as high as 10^1^2cm^2 and that they may provide an unparalleled information processing performance, up to 10^2^0 operations per cm^2 per second, at manageable power consumption.