Architecture and CAD for Deep-Submicron FPGAs
Architecture and CAD for Deep-Submicron FPGAs
An architectural exploration of via patterned gate arrays
Proceedings of the 2003 international symposium on Physical design
Heterogeneous Programmable Logic Block Architectures
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Designing via-configurable logic blocks for regular fabric
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Measuring the Gap Between FPGAs and ASICs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Rapid prototyping on a structured ASIC fabric
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Architecture and design flow for a highly efficient structured ASIC
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A regular fabric design methodology for applications requiring specific layout-level design rules
Microelectronics Journal
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Via-programmable gate arrays (VPGAs) offer a middle ground between application specific integrated circuits and field programmable gate arrays in terms of flexibility, manufactuing cost, speed, power and area. In this paper, we present a novel VPGA logic cell, the complementary universal logic gate (CULG) which can be used to implement both sequential and combinatorial elements. Its performance is compared with a number of other designs including transmission gate, differential cascode voltage switch with pass gate, and standard cell. The CULG is found to have comparable power-delay product and process variation sensitivity to the other designs while offering the lowest power consumption.