Can recursive bisection alone produce routable placements?
Proceedings of the 37th Annual Design Automation Conference
River PLAs: a regular circuit structure
Proceedings of the 39th annual Design Automation Conference
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
Cross-talk immune VLSI design using a network of PLAs embedded in a regular layout fabric
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
An architectural exploration of via patterned gate arrays
Proceedings of the 2003 international symposium on Physical design
Synthesis and placement flow for gain-based programmable regular fabrics
Proceedings of the 2003 international symposium on Physical design
Whirlpool PLAs: a regular logic structure and their synthesis
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Exploring regular fabrics to optimize the performance-cost trade-off
Proceedings of the 40th annual Design Automation Conference
Wire length prediction based clustering and its application in placement
Proceedings of the 40th annual Design Automation Conference
Structured ASICs: Opportunities and Challenges
ICCD '03 Proceedings of the 21st International Conference on Computer Design
Exploring Logic Block Granularity for Regular Fabrics
Proceedings of the conference on Design, automation and test in Europe - Volume 1
On designing via-configurable cell blocks for regular fabrics
Proceedings of the 41st annual Design Automation Conference
Routing architecture exploration for regular fabrics
Proceedings of the 41st annual Design Automation Conference
Heterogeneous Programmable Logic Block Architectures
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
The Magic of a Via-Configurable Regular Fabric
ICCD '04 Proceedings of the IEEE International Conference on Computer Design
A metal and via maskset programmable VLSI design methodology using PLAs
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Optimal Layout of CMOS Functional Arrays
IEEE Transactions on Computers
On designing universal logic blocks and their application to FPGA design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A comparison of via-programmable gate array logic cell circuits
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Via configurable three-input lookup-tables for structured ASICs
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Power gating design for standard-cell-like structured ASICs
Proceedings of the Conference on Design, Automation and Test in Europe
Novel library of logic gates with ambipolar CNTFETs: opportunities for multi-level logic synthesis
Proceedings of the Conference on Design, Automation and Test in Europe
Rover: routing on via-configurable fabrics for standard-cell-like structured ASICs
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
Transistor sizing in lithography-aware regular fabrics
Proceedings of the 24th symposium on Integrated circuits and systems design
Area impact analysis of via-configurable regular fabric for digital integrated circuit design
Proceedings of the 24th symposium on Integrated circuits and systems design
Physical synthesis onto a layout fabric with regular diffusion and polysilicon geometries
Proceedings of the 48th Design Automation Conference
Physical synthesis onto a Sea-of-Tiles with double-gate silicon nanowire transistors
Proceedings of the 49th Annual Design Automation Conference
Proceedings of the Conference on Design, Automation and Test in Europe
Standard cell like via-configurable logic blocks for structured ASIC in an industrial design flow
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Architecture and design flow for a highly efficient structured ASIC
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Routability optimization for crossbar-switch structured ASIC design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Fixed origin corner square inspection layout regularity metric
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Design and analysis of via-configurable routing fabrics for structured ASICs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
A regular fabric design methodology for applications requiring specific layout-level design rules
Microelectronics Journal
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In this paper, we describe the design process of a viaconfigurable logic block for regular fabric. The block consists of a via-configurable functional cell and two via-configurable inverter arrays. A via-configurable functional cell can efficiently implement most commonly used CMOS static cells, and a via-configurable inverter array is efficient in implementing inverters, repeaters, and some pass-transistor logic. The cells have prefabricated transistors, contacts, and M1 wires. The M2 mask is fixed. All of the functions can be realized by customizing only an M1-M2 via mask. We construct a general-purpose fabric based on the via-configurable block and show its great flexibility in implementing a variety of functions. Compared to other fabrics based on look-up tables or programmable logic arrays, our fabric has much higher performance, smaller area, and lower power consumption.