Digital integrated circuits: a design perspective
Digital integrated circuits: a design perspective
Architecture issues and solutions for a high-capacity FPGA
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
A novel predictable segmented FPGA routing architecture
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
The design of a SRAM-based field-programmable gate array—part II: circuit design and layout
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
The effect of LUT and cluster size on deep-submicron FPGA performance and density
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
Speed and area tradeoffs in cluster-based FPGA architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Using sparse crossbars within LUT
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Mixing buffers and pass transistors in FPGA routing architectures
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Architecture and CAD for Deep-Submicron FPGAs
Architecture and CAD for Deep-Submicron FPGAs
VPR: A new packing, placement and routing tool for FPGA research
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
Analytical Framework for Switch Block Design
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Active leakage power optimization for FPGAs
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Combining low-leakage techniques for FPGA routing design
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Layout techniques for FPGA switch blocks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Performance benefits of monolithically stacked 3D-FPGA
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
A routing fabric for monolithically stacked 3D-FPGA
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
TORCH: a design tool for routing channel segmentation in FPGAs
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
The amorphous FPGA architecture
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Interconnect Driver Design for Long Wires in Field-Programmable Gate Arrays
Journal of Signal Processing Systems
FPGA Architecture: Survey and Challenges
Foundations and Trends in Electronic Design Automation
A low-power field-programmable gate array routing fabric
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exploring FPGA routing architecture stochastically
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special section on the ACM IEEE international conference on formal methods and models for codesign (MEMOCODE) 2009
FPGA based on integration of carbon nanorelays and CMOS devices
NANOARCH '09 Proceedings of the 2009 IEEE/ACM International Symposium on Nanoscale Architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
mrFPGA: A novel FPGA architecture with memristor-based reconfiguration
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
FPGA-RR: an enhanced FPGA architecture with RRAM-based reconfigurable interconnects (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
SRAM-based NATURE: a dynamically reconfigurable FPGA based on 10T low-power SRAMs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Off-path leakage power aware routing for SRAM-based FPGAs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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This paper examines circuit design of buffered routing switches in symmetrical, island-style FPGAs. The effects of switch size, tile length, level-restoring, and slow input slew rates are examined. Two new fanin-based switch designs are used to eliminate nearly all of the increase in delay that arises from fanout with a previous switch design. Alternating between buffers and pass transistors is shown to improve connection delay without fanout by 25%. To take advantage of this, we propose schemes to replace some buffers with pass transistors to simultaneously reduce area and delay. Routing a suite of MCNC benchmark circuits shows that 14% in area-delay, or 7% in delay can be saved using the new switch schemes. Alternatively, approximately 13% in area can be saved with no degradation to delay.