Architecture issues and solutions for a high-capacity FPGA

Authors:
Steve Trimberger;Khue Duong;Bob Conn
Affiliations:
Xilinx, Inc., 2100 Logic Drive, San Jose, CA;Xilinx, Inc., 2100 Logic Drive, San Jose, CA;Xilinx, Inc., 2100 Logic Drive, San Jose, CA
Venue:
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Year:
1997

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Abstract

High-capacity FPGAs pose device architects with a variety of problems.The most obvious of theseproblems is interconnect capacity. Others include interconnect performance, clock distribution and IO capacity. This paper describes these problems and the solutions to these problems chosen in the Xilinx XC4000EX family architecture.