TEMPT: technology mapping for the exploration of FPGA architectures with hard-wired connections
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Architecture issues and solutions for a high-capacity FPGA
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
A novel predictable segmented FPGA routing architecture
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Optimizations for a highly cost-efficient programmable logic architecture
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Boolean matching for complex PLBs in LUT-based FPGAs with application to architecture evaluation
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
High-performance carry chains for FPGAs
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
A new high density and very low cost reprogrammable FPGA architecture
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Hybrid product term and LUT based architectures using embedded memory blocks
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Using cluster-based logic blocks and timing-driven packing to improve FPGA speed and density
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
The effect of LUT and cluster size on deep-submicron FPGA performance and density
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
Programmable memory blocks supporting content-addressable memory
FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays
Timing-driven placement for hierarchical programmable logic devices
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Interconnect prediction for programmable logic devices
Proceedings of the 2001 international workshop on System-level interconnect prediction
The stratixπ routing and logic architecture
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
The Stratix II logic and routing architecture
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Layout techniques for FPGA switch blocks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A routing fabric for monolithically stacked 3D-FPGA
Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays
Area and delay trade-offs in the circuit and architecture design of FPGAs
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
FPGA Architecture: Survey and Challenges
Foundations and Trends in Electronic Design Automation
Towards reliable 5Gbps wave-pipelined and 3Gbps surfing interconnect in 65nm FPGAs
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Low-power programmable FPGA routing circuitry
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exploring area and delay tradeoffs in FPGAs with architecture and automated transistor design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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As programmable logic grows more viable for implementing full design systems, performance has become a primary issue for programmable logic device architectures. This paper presents the high-level design of Dali, a PLD architecture specifically aimed at performance-driven applications. We will present significant portions of the background research that contributed to our architectural decisions, an overview of the core routing architecture and benchmarking experiments used to evaluate the prototype device.