Using cluster-based logic blocks and timing-driven packing to improve FPGA speed and density

The effect of LUT and cluster size on deep-submicron FPGA performance and density

FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays

Automatic generation of FPGA routing architectures from high-level descriptions

FPGA '00 Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field programmable gate arrays

Using sparse crossbars within LUT

FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays

Mixing buffers and pass transistors in FPGA routing architectures

FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays

Invited talk: synthesis challenges for next-generation high-performance and high-density PLDs

ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference

RPack: routability-driven packing for cluster-based FPGAs

Proceedings of the 2001 Asia and South Pacific Design Automation Conference

Interconnect enhancements for a high-speed PLD architecture

FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays

Efficient circuit clustering for area and power reduction in FPGAs

FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays

Interconnect resource-aware placement for hierarchical FPGAs

Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design

Using logic duplication to improve performance in FPGAs

FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays

An architectural exploration of via patterned gate arrays

Proceedings of the 2003 international symposium on Physical design

Balancing Logic Utilization and Area Efficiency in FPGAs

FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications

Bubble Partitioning for LUT-Based Sequential Circuits

FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications

A Retargetable Macro Generation Method for the Evaluation of Repetitive Configurable Architectures

FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications

A novel net weighting algorithm for timing-driven placement

Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design

On the Interaction Between Power-Aware FPGA CAD Algorithms

Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design

Delay optimal low-power circuit clustering for FPGAs with dual supply voltages

Proceedings of the 2004 international symposium on Low power electronics and design

Simultaneous timing-driven placement and duplication

Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays

Activity Packing in FPGAs for Leakage Power Reduction

Proceedings of the conference on Design, Automation and Test in Europe - Volume 1

LAP: a logic activity packing methodology for leakage power-tolerant FPGAs

ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design

An integrated design flow for a via-configurable gate array

Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design

Three-dimensional place and route for FPGAs

Proceedings of the 2005 Asia and South Pacific Design Automation Conference

Clustering techniques for coarse-grained, antifuse FPGAs

Proceedings of the 2005 Asia and South Pacific Design Automation Conference

A novel CLB architecture and circuit packing algorithm for logic-area reduction in SRAM-based FPGAs

Proceedings of the 2005 Asia and South Pacific Design Automation Conference

Low-power clustering with minimum logic replication for coarse-grained, antifuse based FPGAs

GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI

Simultaneous placement with clustering and duplication

Proceedings of the 41st annual Design Automation Conference

Optimal simultaneous mapping and clustering for FPGA delay optimization

Proceedings of the 43rd annual Design Automation Conference

Routing architecture optimizations for high-density embedded programmable IP cores

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Via-configurable routing architectures and fast design mappability estimation for regular fabrics

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

NanoMap: an integrated design optimization flow for a hybrid nanotube/CMOS dynamically reconfigurable architecture

Proceedings of the 44th annual Design Automation Conference

FPGA Design Automation: A Survey

Foundations and Trends in Electronic Design Automation

Architecture-specific packing for virtex-5 FPGAs

Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays

Area and delay trade-offs in the circuit and architecture design of FPGAs

Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays

Efficient tree topology for FPGA interconnect network

Proceedings of the 18th ACM Great Lakes symposium on VLSI

Fault tolerant placement and defect reconfiguration for nano-FPGAs

Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design

Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation

Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation

A hybrid Nano/CMOS dynamically reconfigurable system—Part II: Design optimization flow

ACM Journal on Emerging Technologies in Computing Systems (JETC)

Packing Techniques for Virtex-5 FPGAs

ACM Transactions on Reconfigurable Technology and Systems (TRETS)

Benchmarking and evaluating reconfigurable architectures targeting the mobile domain

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Timing-driven nonuniform depopulation-based clustering

International Journal of Reconfigurable Computing - Special issue on selected papers from spl 2009 programmable logic and applications

Technology mapping and clustering for FPGA architectures with dual supply voltages

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Exploring area and delay tradeoffs in FPGAs with architecture and automated transistor design

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Architecture description and packing for logic blocks with hierarchy, modes and complex interconnect

Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays

The effect of LUT and cluster size on deep-submicron FPGA performance and density

IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2002 international symposium on low-power electronics and design (ISLPED)

Comparison between heterogeneous mesh-based and tree-based application specific FPGA

ARC'11 Proceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications

Exploration of heterogeneous FPGA architectures

International Journal of Reconfigurable Computing - Special issue on selected papers from the international workshop on reconfigurable communication-centric systems on chips (ReCoSoC' 2010)

Application-Specific FPGA using heterogeneous logic blocks

ACM Transactions on Reconfigurable Technology and Systems (TRETS)

MO-pack: many-objective clustering for FPGA CAD

Proceedings of the 48th Design Automation Conference

Net-length-based routability-driven power-aware clustering

ACM Transactions on Reconfigurable Technology and Systems (TRETS)

Mitigation of soft errors in SRAM-based FPGAs using CAD tools

Computers and Electrical Engineering

Application specific FPGA using heterogeneous logic blocks

ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications

On power and fault-tolerance optimization in FPGA physical synthesis

Proceedings of the International Conference on Computer-Aided Design

The VTR project: architecture and CAD for FPGAs from verilog to routing

Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays

Reducing the cost of floating-point mantissa alignment and normalization in FPGAs

Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays

A new heterogeneous tree-based application specific FPGA and its comparison with mesh-based application specific FPGA

Microprocessors & Microsystems

Indirect connection aware attraction for FPGA clustering (abstract only)

Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays

A novel FPGA design framework with VLSI post-routing performance analysis (abstract only)

Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays

The survivability of design-specific spare placement in FPGA architectures with high defect rates

ACM Transactions on Design Automation of Electronic Systems (TODAES)

An efficient and effective analytical placer for FPGAs

Proceedings of the 50th Annual Design Automation Conference

Analyzing System-Level Information’s Correlation to FPGA Placement

ACM Transactions on Reconfigurable Technology and Systems (TRETS)

Integration of Net-Length Factor with Timing- and Routability-Driven Clustering Algorithms

ACM Transactions on Reconfigurable Technology and Systems (TRETS)

An Analytical Model for Evaluating Static Power of Homogeneous FPGA Architectures

ACM Transactions on Reconfigurable Technology and Systems (TRETS)

Towards interconnect-adaptive packing for FPGAs

Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays

Exploration and optimization of a homogeneous tree-based application specific inflexible FPGA

Microelectronics Journal