Invited talk: synthesis challenges for next-generation high-performance and high-density PLDs

Layout driven technology mapping

DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference

Optimal clustering for delay minimization

DAC '93 Proceedings of the 30th international Design Automation Conference

Combinational logic synthesis for LUT based field programmable gate arrays

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Partially-dependent functional decomposition with applications in FPGA synthesis and mapping

FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays

Combining technology mapping and placement for delay-optimization in FPGA designs

ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design

Large scale circuit partitioning with loose/stable net removal and signal flow based clustering

ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design

An exact solution to simultaneous technology mapping and linear placement problem

ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design

Boolean matching for complex PLBs in LUT-based FPGAs with application to architecture evaluation

FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays

SMAP: heterogeneous technology mapping for area reduction in FPGAs with embedded memory arrays

FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays

Technology mapping for FPGAs with embedded memory blocks

FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays

Delay-optimal technology mapping for FPGAs with heterogeneous LUTs

DAC '98 Proceedings of the 35th annual Design Automation Conference

Exact tree-based FPGA technology mapping for logic blocks with independent LUTs

DAC '98 Proceedings of the 35th annual Design Automation Conference

Delay-oriented technology mapping for heterogeneous FPGAs with bounded resources

Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design

Intellectual property protection by watermarking combinational logic synthesis solutions

Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design

Cut ranking and pruning: enabling a general and efficient FPGA mapping solution

FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays

Using cluster-based logic blocks and timing-driven packing to improve FPGA speed and density

FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays

On circuit clustering for area/delay tradeoff under capacity and pin constraints

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Rectification method for lookup-table type FPGA's

ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

Technology mapping for FPGAs with nonuniform pin delays and fast interconnections

Proceedings of the 36th annual ACM/IEEE Design Automation Conference

Simultaneous circuit partitioning/clustering with retiming for performance optimization

Proceedings of the 36th annual ACM/IEEE Design Automation Conference

Circuit clustering for delay minimization under area and pin constraints

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Optimal clock period clustering for sequential circuits with retiming

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems