Combinational logic synthesis for LUT based field programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
SMAP: heterogeneous technology mapping for area reduction in FPGAs with embedded memory arrays
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Technology mapping for FPGAs with embedded memory blocks
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Delay-optimal technology mapping for FPGAs with heterogeneous LUTs
DAC '98 Proceedings of the 35th annual Design Automation Conference
Exact tree-based FPGA technology mapping for logic blocks with independent LUTs
DAC '98 Proceedings of the 35th annual Design Automation Conference
A new high density and very low cost reprogrammable FPGA architecture
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Invited talk: synthesis challenges for next-generation high-performance and high-density PLDs
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Creating a power-aware structured ASIC
Proceedings of the 2004 international symposium on Low power electronics and design
FPGA Design Automation: A Survey
Foundations and Trends in Electronic Design Automation
A Novel Local Interconnect Architecture for Variable Grain Logic Cell
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Evaluating variable-grain logic cells using heterogeneous technology mapping
ARC'07 Proceedings of the 3rd international conference on Reconfigurable computing: architectures, tools and applications
| Hi-index | 0.00 |