Combining technology mapping and placement for delay-optimization in FPGA designs

  • Authors:
  • Chau-Shen Chen;Yu-Wen Tsay;TingTing Hwang;Allen C. H. Wu;Youn-Long Lin

  • Affiliations:
  • Department of Computer Science, Tsing Hua University, Hsin-Chu, Taiwan 30043, R.O.C.;Department of Computer Science, Tsing Hua University, Hsin-Chu, Taiwan 30043, R.O.C.;Department of Computer Science, Tsing Hua University, Hsin-Chu, Taiwan 30043, R.O.C.;Department of Computer Science, Tsing Hua University, Hsin-Chu, Taiwan 30043, R.O.C.;Department of Computer Science, Tsing Hua University, Hsin-Chu, Taiwan 30043, R.O.C.

  • Venue:
  • ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
  • Year:
  • 1993

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Abstract