Simultaneous depth and area minimization in LUT-based FPGA mapping
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
Combinational logic synthesis for LUT based field programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Technology mapping for low power in logic synthesis
Integration, the VLSI Journal
IBM Systems Journal
Optimizing designs containing black boxes
DAC '97 Proceedings of the 34th annual Design Automation Conference
Solving covering problems using LPR-based lower bounds
DAC '97 Proceedings of the 34th annual Design Automation Conference
Robust IP watermarking methodologies for physical design
DAC '98 Proceedings of the 35th annual Design Automation Conference
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Handbook of Applied Cryptography
Handbook of Applied Cryptography
Logic Synthesis and Verification Algorithms
Logic Synthesis and Verification Algorithms
Robust techniques for watermarking sequential circuit designs
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Effective iterative techniques for fingerprinting design IP
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Behavioral synthesis techniques for intellectual property protection
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Localized watermarking: methodology and application to operation scheduling
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Invited talk: synthesis challenges for next-generation high-performance and high-density PLDs
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Publicly detectable techniques for the protection virtual components
Proceedings of the 38th annual Design Automation Conference
Zero overhead watermarking technique for FPGA designs
Proceedings of the 13th ACM Great Lakes symposium on VLSI
Security in sensor networks: watermarking techniques
Wireless sensor networks
A watermarking system for IP protection by a post layout incremental router
Proceedings of the 42nd annual Design Automation Conference
Behavioral synthesis techniques for intellectual property protection
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Watermarking System for IP Protection by Buffer Insertion Technique
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Power Signature Watermarking of IP Cores for FPGAs
Journal of Signal Processing Systems
Active hardware metering for intellectual property protection and security
SS'07 Proceedings of 16th USENIX Security Symposium on USENIX Security Symposium
A method for hardware metering
ICCOM'05 Proceedings of the 9th WSEAS International Conference on Communications
An Efficient and Reliable Watermarking System for IP Protection
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
A SVD-based fragile watermarking scheme for image authentication
IWDW'02 Proceedings of the 1st international conference on Digital watermarking
Soft IP protection: watermarking HDL codes
IH'04 Proceedings of the 6th international conference on Information Hiding
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