Robust IP watermarking methodologies for physical design
DAC '98 Proceedings of the 35th annual Design Automation Conference
Signature hiding techniques for FPGA intellectual property protection
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Intellectual property protection by watermarking combinational logic synthesis solutions
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Dynamic power consumption in Virtex™-II FPGA family
FPGA '02 Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field-programmable gate arrays
JPEG 2000: Image Compression Fundamentals, Standards and Practice
JPEG 2000: Image Compression Fundamentals, Standards and Practice
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
Digital Watermarks for Audio Signals
ICMCS '96 Proceedings of the 1996 International Conference on Multimedia Computing and Systems
Constraint-based watermarking techniques for design IP protection
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
RF authenticated protection scheme for SRAM-based FPGA IP cores
International Journal of Electronic Security and Digital Forensics
Energy attacks and defense techniques for wireless systems
Proceedings of the sixth ACM conference on Security and privacy in wireless and mobile networks
Secure public verification of IP marks in FPGA design through a zero-knowledge protocol
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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In this paper, we introduce a new method for watermarking of IP cores for FPGA architectures where the signature (watermark) is detected at the power supply pins of the FPGA. This is the first watermarking method where the signature is extracted in this way. We are able to sign IP cores at the netlist as well as the bitfile level, so a wide spectrum of cores can be protected. In principle, the proposed power watermarking method works for all kinds of FPGAs. For Xilinx FPGAs, we demonstrate in detail that we can integrate the watermarking algorithms and the signature into the functionality of the watermarked core. So it is very hard to remove the watermark without destroying the core. Furthermore, we introduce a detection algorithm which can decode the signature from a voltage trace with high reliability. Additionally, two enhanced robustness algorithms are introduced which improve the detection probability in case of considerable noise sources. Using these techniques, it is possible to decode the signature even if other cores operate on the same device at the same time.