Integer and combinatorial optimization
Integer and combinatorial optimization
New ideas for solving covering problems
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Instruction selection using binate covering for code size optimization
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Logic synthesis for vlsi design
Logic synthesis for vlsi design
Negative thinking by incremental problem solving: application to unate covering
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
A new viewpoint on code generation for directed acyclic graphs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Intellectual property protection by watermarking combinational logic synthesis solutions
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
On using satisfiability-based pruning techniques in covering algorithms
DATE '00 Proceedings of the conference on Design, automation and test in Europe
An efficient heuristic approach to solve the unate covering problem
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Constraint-driven communication synthesis
Proceedings of the 39th annual Design Automation Conference
Logic Synthesis and Verification
An algorithmic approach to optimizing fault coverage for BIST logic synthesis
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Satisfiability-Based Algorithms for Boolean Optimization
Annals of Mathematics and Artificial Intelligence
Effective Lower Bounding Techniques for Pseudo-Boolean Optimization
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Effective bounding techniques for solving unate and binate covering problems
Proceedings of the 42nd annual Design Automation Conference
Solving the minimum-cost satisfiability problem using SAT based branch-and-bound search
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Search space pruning techniques in ATPG for VLSI circuits
ICC'05 Proceedings of the 9th International Conference on Circuits
The Instruction-Set Extension Problem: A Survey
ARC '08 Proceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and Applications
Branch and Bound for Boolean Optimization and the Generation of Optimality Certificates
SAT '09 Proceedings of the 12th International Conference on Theory and Applications of Satisfiability Testing
Algorithms for Weighted Boolean Optimization
SAT '09 Proceedings of the 12th International Conference on Theory and Applications of Satisfiability Testing
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
A Framework for Certified Boolean Branch-and-Bound Optimization
Journal of Automated Reasoning
The Instruction-Set Extension Problem: A Survey
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
On applying cutting planes in DLL-Based algorithms for pseudo-boolean optimization
SAT'05 Proceedings of the 8th international conference on Theory and Applications of Satisfiability Testing
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Unate and binate covering problems are a special class ofgeneral integer linear programming problems with which several problemsin logic synthesis, such as two-level logic minimization and technologymapping, are formulated. Previous branch-and-bound methodsfor exactly solving these problems use lower-bounding techniques basedon finding maximal independent sets. In this paper we examine lower-boundingtechniques based on linear programming relaxation (LPR) forthe binate covering problem. We show that a combination of traditionalreductions (essentiality and dominance) and incremental computation ofLPR-based lower bounds can exactly solve difficult covering problemsorders of magnitude faster than traditional methods.