Artificial Intelligence
Graph-Based Algorithms for Boolean Function Manipulation
IEEE Transactions on Computers
Prime Implicants, Minimum Covers, and the Complexity of Logic Simplification
IEEE Transactions on Computers
Generating Essential Primes for a Boolean Function with Multiple-Valued Inputs
IEEE Transactions on Computers
A theory of diagnosis from first principles
Artificial Intelligence
Artificial Intelligence
Symbolic prime generation for multiple-valued functions
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Implicit and incremental computation of primes and essential primes of Boolean functions
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Absolute Minimization of Completely Specified Switching Functions
IEEE Transactions on Computers
Computer aided logical design with emphasis on VLSI (4th ed.)
Computer aided logical design with emphasis on VLSI (4th ed.)
Symbolic Boolean manipulation with ordered binary-decision diagrams
ACM Computing Surveys (CSUR)
A new viewpoint on two-level logic minimization
DAC '93 Proceedings of the 30th international Design Automation Conference
Two-level logic minimization: an overview
Integration, the VLSI Journal
New ideas for solving covering problems
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Solving covering problems using LPR-based lower bounds
DAC '97 Proceedings of the 34th annual Design Automation Conference
Negative thinking by incremental problem solving: application to unate covering
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Doing two-level logic minimization 100 times faster
Proceedings of the sixth annual ACM-SIAM symposium on Discrete algorithms
A Machine-Oriented Logic Based on the Resolution Principle
Journal of the ACM (JACM)
On the minimization of SOPs for bi-decomposition functions
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Worst and Best Irredundant Sum-of-Products Expressions
IEEE Transactions on Computers
Logic Design and Switching Theory
Logic Design and Switching Theory
Logic Design of Digital Systems
Logic Design of Digital Systems
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Representations of Discrete Functions
Representations of Discrete Functions
Logic Synthesis and Verification Algorithms
Logic Synthesis and Verification Algorithms
Switching and Finite Automata Theory: Computer Science Series
Switching and Finite Automata Theory: Computer Science Series
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Introduction to Logic and Switching Theory
Introduction to Logic and Switching Theory
Computer aided minimization procedure for boolean functions
DAC '84 Proceedings of the 21st Design Automation Conference
An application of multiple-valued logic to a design of programmable logic arrays
MVL '78 Proceedings of the eighth international symposium on Multiple-valued logic
Logic synthesis for vlsi design
Logic synthesis for vlsi design
Hardness of approximate two-level logic minimization and PAC learning with membership queries
Journal of Computer and System Sciences
Bus encoding for total power reduction using a leakage-aware buffer configuration
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This chapter presents both exact and heuristic two-level logic minimization algorithms. For exact logic minimization, it shows various techniques to reduce the complexity of covering problems, discusses branching heuristics, and presents several methods to prune the recursions. For heuristic minimization, it presents the core procedures of the ESPRESSO minimizer. Finally, the chapter surveys various works related to two-level logic minimization.