Future paths for integer programming and links to artificial intelligence
Computers and Operations Research - Special issue: Applications of integer programming
Espresso-signature: a new exact minimizer for logic functions
DAC '93 Proceedings of the 30th international Design Automation Conference
New ideas for solving covering problems
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Solving covering problems using LPR-based lower bounds
DAC '97 Proceedings of the 34th annual Design Automation Conference
An efficient heuristic approach to solve the unate covering problem
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Logic Synthesis and Verification Algorithms
Logic Synthesis and Verification Algorithms
The Approximability of Constraint Satisfaction Problems
SIAM Journal on Computing
A fast pseudo-boolean constraint solver
Proceedings of the 40th annual Design Automation Conference
Logic synthesis for vlsi design
Logic synthesis for vlsi design
On SAT Instance Classes and a Method for Reliable Performance Experiments with SAT Solvers
Annals of Mathematics and Artificial Intelligence
Optimization algorithms for the minimum-cost satisfiability problem
Optimization algorithms for the minimum-cost satisfiability problem
Evidence for invariants in local search
AAAI'97/IAAI'97 Proceedings of the fourteenth national conference on artificial intelligence and ninth conference on Innovative applications of artificial intelligence
Explicit and implicit algorithms for binate covering problems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Negative thinking in branch-and-bound: the case of unate covering
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Search pruning techniques in SAT-based branch-and-bound algorithms for the binate covering problem
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
High-contrast algorithm behavior: observation, hypothesis, and experimental design
Proceedings of the 2007 workshop on Experimental computer science
Performance testing of combinatorial solvers with isomorph class instances
Proceedings of the 2007 workshop on Experimental computer science
High-contrast algorithm behavior: observation, conjecture, and experimental design
ecs'07 Experimental computer science on Experimental computer science
Performance testing of combinatorial solvers with isomorph class instances
ecs'07 Experimental computer science on Experimental computer science
The Instruction-Set Extension Problem: A Survey
ARC '08 Proceedings of the 4th international workshop on Reconfigurable Computing: Architectures, Tools and Applications
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
A generalized control-flow-aware pattern recognition algorithm for behavioral synthesis
Proceedings of the Conference on Design, Automation and Test in Europe
The Instruction-Set Extension Problem: A Survey
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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Covering problems arise in many areas of electronic design automation such as logic minimization and technology mapping. An exact solution can critically impact both size and performance of the devices being designed. This paper introduces eclipse, a branch-and-bound solver that can solve many covering problems orders of magnitude faster than existing solvers. When used in place of the default covering engine of a well-known logic minimizer, eclipse makes it possible to find, in less than six minutes, true minima for three benchmark problems that have eluded exact solutions for more than a decade.