Using cluster-based logic blocks and timing-driven packing to improve FPGA speed and density
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Performance-driven multi-level clustering with application to hierarchical FPGA mapping
Proceedings of the 38th annual Design Automation Conference
Efficient circuit clustering for area and power reduction in FPGAs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
VPR: A new packing, placement and routing tool for FPGA research
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
On the Interaction Between Power-Aware FPGA CAD Algorithms
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
A detailed power model for field-programmable gate arrays
ACM Transactions on Design Automation of Electronic Systems (TODAES)
RECONFIG '05 Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs (ReConFig'05) on Reconfigurable Computing and FPGAs
Optimality study of logic synthesis for LUT-based FPGAs
Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field programmable gate arrays
Simultaneous placement with clustering and duplication
Proceedings of the 41st annual Design Automation Conference
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Timing-driven nonuniform depopulation-based clustering
International Journal of Reconfigurable Computing - Special issue on selected papers from spl 2009 programmable logic and applications
Technology mapping and clustering for FPGA architectures with dual supply voltages
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Indirect connection aware attraction for FPGA clustering (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Integration of Net-Length Factor with Timing- and Routability-Driven Clustering Algorithms
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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Applications targeting FPGA integrated systems impose strict energy, channel width and delay constraints. We introduce the first many-objective clustering, MO-Pack, that targets these performance metrics concurrently. Detailed performance comparisons over state of the art clustering strategies targeting energy (P-T-VPack), delay (T-VPack), channel width (iRAC), and timing and routability (T-RPack) show that MO-Pack achieves its goals without increasing the logic area.