FPGA based on integration of carbon nanorelays and CMOS devices

  • Authors:
  • Ming Liu;Haigang Yang;Sansiri Tanachutiwat;Wei Wang

  • Affiliations:
  • Institute of Electronics, Chinese Academy of Sciences, Beijing, China;Institute of Electronics, Chinese Academy of Sciences, Beijing, China;College of Nanoscales Science and Engineering, University at Albany, State University of New York, USA;College of Nanoscales Science and Engineering, University at Albany, State University of New York, USA

  • Venue:
  • NANOARCH '09 Proceedings of the 2009 IEEE/ACM International Symposium on Nanoscale Architectures
  • Year:
  • 2009

Quantified Score

Hi-index 0.00

Visualization

Abstract

In this paper, a novel reconfigurable architecture, cFPGA (CMOS-Nanorelay FPGA) is developed by integrating carbon nanorelays and CMOS devices to function as FPGA components. cFPGA is a highly efficient architecture, providing 2X density and standby power improvement along with 30% dynamic power reduction as compared to the CMOS FPGA circuits. This performance improvement is achieved by using 2T1N structures as routing switches: Two CMOS transistors (2T): one for programming purpose and the other for signal transmission; one nanorelay (1N): the switching element. These 2T1N structures do not have nanorelays in the signal path, thereby eliminating the large quantum resistance in the path. This is a significant improvement over the conventional CMOS-nanorelay hybrid FPGA circuits. The proposed cFPGA is implemented using vertical carbon nanotubes which are relatively easier to fabricate as compared with horizontal nanotubes.