Performance analysis of carbon nanotube interconnects for VLSI applications
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Single-walled carbon nanotube electronics
IEEE Transactions on Nanotechnology
An RF circuit model for carbon nanotubes
IEEE Transactions on Nanotechnology
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
FPCNA: a field programmable carbon nanotube array
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Design and evaluation of a carbon nanotube-based programmable architecture
International Journal of Parallel Programming
Efficient FPGAs using nanoelectromechanical relays
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
Reconfigurable circuit design with nanomaterials
Proceedings of the Conference on Design, Automation and Test in Europe
FPGA based on integration of carbon nanorelays and CMOS devices
NANOARCH '09 Proceedings of the 2009 IEEE/ACM International Symposium on Nanoscale Architectures
Computing with nanoscale memory: Model and architecture
NANOARCH '09 Proceedings of the 2009 IEEE/ACM International Symposium on Nanoscale Architectures
NEMS based thermal management for 3D many-core system
NANOARCH '11 Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures
Proceedings of the International Conference on Computer-Aided Design
Nano-electro-mechanical relays for FPGA routing: experimental demonstration and a design technique
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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Higher integration density of nanoscale CMOS causes two major design challenges in SRAM-based Field Programmable Gate Array (FPGA) designs: large power dissipation (contributed by both leakage and dynamic power) and reduced reliability of operation. In this paper, we propose a hybrid design approach for SRAM-based FPGA that can leverage on non-volatile carbon nanotube based nano electro-mechanical systems (NEMS) switches for low static and dynamic power. Simulations show that the proposed CMOS-NEMS lookup table (LUT) based circuits can achieve a reduction of up to 91% in total power at iso-performance, compared to the conventional CMOS-based LUT circuits.