NanoFabrics: spatial computing using molecular electronics
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
Architecture and CAD for Deep-Submicron FPGAs
Architecture and CAD for Deep-Submicron FPGAs
Design of Interconnection Networks for Programmable Logic
Design of Interconnection Networks for Programmable Logic
Exploring technology alternatives for nano-scale FPGA interconnects
Proceedings of the 42nd annual Design Automation Conference
Nanowire-based programmable architectures
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Performance analysis of carbon nanotube interconnects for VLSI applications
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Low power FPGA design using hybrid CMOS-NEMS approach
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
FPCNA: a field programmable carbon nanotube array
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
The effect of LUT and cluster size on deep-submicron FPGA performance and density
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2002 international symposium on low-power electronics and design (ISLPED)
Single-walled carbon nanotube electronics
IEEE Transactions on Nanotechnology
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It is generally acknowledged that nanoelectronics will eventually replace traditional silicon CMOS in high-performance integrated circuits. To that end, considerable investments are being made in the research and development of new nanoelectronic devices and fabrication techniques. When these technologies mature, they can be used to create the next generation of electronic systems. Given the intrinsic properties of nanomaterials, such systems are likely to deviate considerably from their predecessors. In this paper, we compare two potential architectures for the design of nanoelectronic FPGAs. By evaluating the performance of nanoelectronic devices at the systems level, we aim to provide insights into how they can be used effectively.