Global interconnections in FPGAs: modeling and performance analysis

Authors:
Terrence Mak;Crescenzo D'Alessandro;Pete Sedcole;Peter Y. K. Cheung;Alex Yakovlev;Wayne Luk
Affiliations:
Imperial College, London, United Kngdm;Newcastle University, Newcastle, United Kngdm;Imperial College, London, United Kngdm;Imperial College, London, United Kngdm;Newcastle University, Newcastle, United Kngdm;Imperial College, London, United Kngdm
Venue:
Proceedings of the 2008 international workshop on System level interconnect prediction
Year:
2008

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Abstract

This paper presents a new model forglobal routings in FPGAs. The irregular interconnections in FPGAs can be generalized as multiple buffered interconnect stages, of which the electrical waveform can be adequately approximated. Based on the model, expressions of delay and fundamental throughput of the interconnections have been derived and validated. They are shown in line with the SPICE and FPGA experimental results. Moreover, the model shows that interconnection throughput can be significantly increased using wave-pipelined signaling instead of the conventional delay-based synchronous approach, as has been demonstrated in our FPGA experiments. We conclude this paper by having a discussion about a strategy to further enhance the interconnect throughput.