Architecture and CAD for Deep-Submicron FPGAs
Architecture and CAD for Deep-Submicron FPGAs
Design of Interconnection Networks for Programmable Logic
Design of Interconnection Networks for Programmable Logic
The dominating set problem is fixed parameter tractable for graphs of bounded genus
Journal of Algorithms
Graph Theory With Applications
Graph Theory With Applications
Design automation for reconfigurable interconnection networks
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
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The Interconnection Graph Problem (IGP) is to compute for a given hypergraph H= (V, R) a graph G= (V, E) with the minimum number of edges |E| such that for all hyperedges N驴 Rthe subgraph of Ginduced by Nis connected. Computing feasible interconnection graphs is basically motivated by the design of reconfigurable interconnection networks. This paper proves that IGP is NP-complete and hard to approximate even when all hyperedges of Hhave at most three vertices. Afterwards it presents a search tree based parameterized algorithm showing that the problem is fixed-parameter tractable when the hyperedge size of His bounded. Moreover, the paper gives a reduction based greedy algorithm and closes with its experimental justification.