A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs

Authors:
Doris Chen;Deshanand Singh;Jeffrey Chromczak;David Lewis;Ryan Fung;David Neto;Vaughn Betz
Affiliations:
Altera Corporation, Toronto, ON, Canada;Altera Corporation, Toronto, ON, Canada;Altera Corporation, Toronto, ON, Canada;Altera Corporation, Toronto, ON, Canada;Altera Corporation, Toronto, ON, Canada;Altera Corporation, Toronto, ON, Canada;Altera Corporation, Toronto, ON, Canada
Venue:
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
Year:
2010

Citing 3
Cited 1

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Metastable Behavior in Digital Systems

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Metastability challenges for 65nm and beyond: simulation and measurements

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Abstract

Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domains. The impact of metastability is increasing as process geometries shrink and supply voltages drop faster than transistor Vts. FPGA technologies are significantly affected since leading edge FPGAs are amongst the first devices to adopt the most recent process nodes. In this paper, we present a comprehensive suite of techniques for modeling, characterizing and optimizing metastability effects in FPGAs. We first discuss a theoretical model of metastability, and verify the predictions using both circuit level simulations and board measurements. Next we show how designers have traditionally dealt with metastability problems and contrast that with the automatic CAD algorithms described in this paper that both analyze and optimize metastability-related issues. Through our detailed experimental results, we show that we can improve the metastability characteristics of a large suite of industrial benchmarks by an average of 268,000 times with our optimization techniques.