Architecture and CAD for Deep-Submicron FPGAs
Architecture and CAD for Deep-Submicron FPGAs
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This paper proposes the use of a particle swarm optimization algorithm to the Field Programmable Gate Arrays (FPGA) placement problem. Two different versions of the particle swarm optimization algorithm are proposed. The first is a discrete version that solves the FPGA placement problem entirely in the discrete domain, while the second version is continuous in nature. Both versions are applied to several well-known FPGA benchmarks and the results are compared to those obtained by an academic placement tool that is based on adaptive simulated annealing. Results show that the proposed methods are competitive for small and medium-sized problems. For large-sized problems, the proposed methods provide very close results.