On using satisfiability-based pruning techniques in covering algorithms
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Algorithms for VLSI Physical Design Automation
Algorithms for VLSI Physical Design Automation
Architecture and CAD for Deep-Submicron FPGAs
Architecture and CAD for Deep-Submicron FPGAs
Logic Synthesis and Verification Algorithms
Logic Synthesis and Verification Algorithms
Thermal Testing on Reconfigurable Computers
IEEE Design & Test
Temperature-aware microarchitecture
Proceedings of the 30th annual international symposium on Computer architecture
Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
Analytical Model for Sensor Placement on Microprocessors
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Minimal skew clock embedding considering time variant temperature gradient
Proceedings of the 2007 international symposium on Physical design
Thermal sensor allocation and placement for reconfigurable systems
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Thermal and power characterization of field-programmable gate arrays
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
An FPGA chip identification generator using configurable ring oscillators
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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A dynamic monitoring of thermal behavior of hardware resources using thermal sensors is very important to maintain the operation of systems safe and reliable. This article addresses the problem of thermal sensor allocation and placement for reconfigurable systems. For programmable logic arrays, the degree of the use of hardware resources in the systems highly depends on the target application to be implemented, making the allocation of thermal sensors at the manufacturing stage inadequate (or too costly if implemented) due to the unpredictable thermal profile. This means that the thermal sensor allocation could be processed at the time when the reconfigurable logic is implemented (i.e., at the post manufacturing stage). This work proposes an effective solution to the problem of thermal sensor allocation and placement at the post-manufacturing stage. Specifically, we define the Sensor Allocation and Placement Problem (SAPP), and propose a solution which formulates SAPP into the Unate-Covering Problem (UCP) and solves it optimally. Also we combine SAPP with temperature correlation to reduce required sensors more aggressively and propose a solution by applying UCP again. We then provide an extended solution to handle a practical design issue where the hardware resources for the sensor implementation on specific array locations have already been used up by the application logic. Experimental results using MCNC benchmarks show that our proposed technique uses 62.4% and 19.7% less number of sensors to monitor hotspots on the average than that used by the grid-based and the bisection-based approaches while the overhead of auxiliary circuitry is minimized, respectively.