Layout algorithm for VLSI design
ACM Computing Surveys (CSUR)
Efficient decomposition of polygons into L-shapes with application to VLSI layouts
ACM Transactions on Design Automation of Electronic Systems (TODAES)
On floorplans of planar graphs
STOC '97 Proceedings of the twenty-ninth annual ACM symposium on Theory of computing
The future of logic synthesis and physical design in deep-submicron process geometries
Proceedings of the 1997 international symposium on Physical design
Performance-driven soft-macro clustering and placement by preserving HDL design hierarchy
ISPD '98 Proceedings of the 1998 international symposium on Physical design
On convex formulation of the floorplan area minimization problem
ISPD '98 Proceedings of the 1998 international symposium on Physical design
Getting to the bottom of deep submicron
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
A graph-partitioning-based approach for multi-layer constrained via minimization
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
A timing-driven soft-macro resynthesis method in interaction with chip floorplanning
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
ACM Transactions on Design Automation of Electronic Systems (TODAES)
MCM placement using a realistic thermal model
GLSVLSI '00 Proceedings of the 10th Great Lakes symposium on VLSI
Exact switchbox routing with search space reduction
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Aggressor alignment for worst-case coupling noise
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Cost based tradeoff analysis of standard cell designs
SLIP '00 Proceedings of the 2000 international workshop on System-level interconnect prediction
Floorplan sizing by linear programming approximation
Proceedings of the 37th Annual Design Automation Conference
Timing-driven placement based on partitioning with dynamic cut-net control
Proceedings of the 37th Annual Design Automation Conference
An architecture-driven metric for simultaneous placement and global routing for FPGAs
Proceedings of the 37th Annual Design Automation Conference
Boolean satisfiability in electronic design automation
Proceedings of the 37th Annual Design Automation Conference
Integrated floorplanning and interconnect planning
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Fast evaluation of sequence pair in block placement by longest common subsequence computation
DATE '00 Proceedings of the conference on Design, automation and test in Europe
An exact algorithm for solving difficult detailed routing problems
Proceedings of the 2001 international symposium on Physical design
FAST-SP: a fast algorithm for block placement based on sequence pair
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Improved cut sequences for partitioning based placement
Proceedings of the 38th annual Design Automation Conference
Information Processing Letters
Delay budgeting for a timing-closure-driven design method
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Placing and Routing Circuits on FPGAs by Means of Parallel and Distributed Genetic Programming
ICES '01 Proceedings of the 4th International Conference on Evolvable Systems: From Biology to Hardware
Minimizing routing configuration cost in dynamically reconfigurable FPGAs
IPDPS '01 Proceedings of the 15th International Parallel & Distributed Processing Symposium
Heuristics for Hierarchical Partitioning with Application to Model Checking
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Some Applications of Orderly Spanning Trees in Graph Drawing
GD '02 Revised Papers from the 10th International Symposium on Graph Drawing
Box-Rectangular Drawings of Plane Graphs
WG '99 Proceedings of the 25th International Workshop on Graph-Theoretic Concepts in Computer Science
Routing methodology for minimizing 1nterconnect energy dissipation
Proceedings of the 13th ACM Great Lakes symposium on VLSI
Interconnect-aware high-level synthesis for low power
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Reduction of coupling effects by optimizing the 3-D configuration of the routing grid
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on low power
Orthogonal hypergraph routing for improved visibility
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Quantum-Dot Cellular Automata (QCA) circuit partitioning: problem modeling and solutions
Proceedings of the 41st annual Design Automation Conference
A method for correcting the functionality of a wire-pipelined circuit
Proceedings of the 41st annual Design Automation Conference
SUNMAP: a tool for automatic topology selection and generation for NoCs
Proceedings of the 41st annual Design Automation Conference
A fast congestion estimator for routing with bounded detours
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Memory in processor: a novel design paradigm for supercomputing architectures
MEDEA '03 Proceedings of the 2003 workshop on MEmory performance: DEaling with Applications , systems and architecture
NoC Synthesis Flow for Customized Domain Specific Multiprocessor Systems-on-Chip
IEEE Transactions on Parallel and Distributed Systems
Skew-programmable clock design for FPGA and skew-aware placement
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Genetic Programming and Evolvable Machines
Reduction of crosstalk noise by optimizing 3-D configuration of the routing grid
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Droplet routing in the synthesis of digital microfluidic biochips
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Systematic temperature sensor allocation and placement for microprocessors
Proceedings of the 43rd annual Design Automation Conference
Design and verification of high-speed VLSI physical design
Journal of Computer Science and Technology
Tutorial on congestion prediction
Proceedings of the 2007 international workshop on System level interconnect prediction
Thermal sensor allocation and placement for reconfigurable systems
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Low Power VLSI Design Techniques - The Current State
Integrated Computer-Aided Engineering
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
An efficient placement and routing technique for fault-tolerant distributed embedded computing
ACM Transactions on Embedded Computing Systems (TECS)
Thermal sensor allocation and placement for reconfigurable systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Analog layout generator for CMOS circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Partitioning of code for a massively parallel machine
Partitioning of code for a massively parallel machine
Interactive circuit diagram visualization
CGIM '08 Proceedings of the Tenth IASTED International Conference on Computer Graphics and Imaging
Hybrid evolutionary algorithm of planning VLSI
Proceedings of the 12th annual conference on Genetic and evolutionary computation
Simulated annealing based VLSI circuit partitioning for delay minimization
CI'10 Proceedings of the 4th WSEAS international conference on Computational intelligence
ASIC Design of a Digital Fuzzy System on Chip for Medical Diagnostic Applications
Journal of Medical Systems
Efficient congestion mitigation using congestion-aware steiner trees and network coding topologies
VLSI Design - Special issue on CAD for Gigascale SoC Design and Verification Solutions
Placement for immunity of transient faults in cell-based design of nanometer circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A theoretical upper bound for IP-based floorplanning
COCOON'05 Proceedings of the 11th annual international conference on Computing and Combinatorics
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From the Publisher:This work covers all aspects of physical design. The book is a core reference for graduate students and CAD professionals. For students, concept and algorithms are presented in an intuitive manner. For CAD professionals, the material presents a balance of theory and practice. An extensive bibliography is provided which is useful for finding advanced material on a topic. At the end of each chapter, exercises are provided, which range in complexity from simple to research level.