Optimal orientations of cells in slicing floorplan designs
Information and Control
Heuristic algorithms for combined standard cell and macro block layouts
AUSCRYPT '90 Proceedings of the sixth MIT conference on Advanced research in VLSI
Integrated placement for mixed macro cell and standard cell designs
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Floor-planning by graph dualization: 2-concave rectilinear modules
SIAM Journal on Computing
DAC '93 Proceedings of the 30th international Design Automation Conference
Area minimization for hierarchical floorplans
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
A unified approach to topology generation and area optimization of general floorplans
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Module placement on BSG-structure and IC layout applications
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Algorithms for VLSI Physical Design Automation
Algorithms for VLSI Physical Design Automation
An Introduction to VLSI Physical Design
An Introduction to VLSI Physical Design
DAC '82 Proceedings of the 19th Design Automation Conference
Area minimization for floorplans
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Constrained "Modern" Floorplanning
Proceedings of the 2003 international symposium on Physical design
Area reduction by deadspace utilization on interconnect optimized floorplan
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An enhanced congestion-driven floorplanner
WSEAS Transactions on Circuits and Systems
Congestion-driven floorplanning with module reshaping
ICC'08 Proceedings of the 12th WSEAS international conference on Circuits
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This paper presents three minimum-area floorplanning algorithms that use flexible arbitrary rectilinear shapes for the standard cell regions in MBC design. The first algorithm (pure HCST) introduces a grid traversal technique which guarantees a minimum-area floorplan. The second algorithm (Hybrid-BF) uses a combination of HCST and Breadth First (BF) traversals to give a practical solution that approximately places flexible blocks at specified locations called seeds. The third algorithm (Hybrid-MBF) improves on the shapes of the flexible blocks generated by Hybrid-BF by using a combination of HCST and a Modified Breadth First (MBF) traversal. All three algorithms are polynomial in the number of grid squares. Optimized implementations of Hybrid-BF and Hybrid-MBF required less than two seconds on a SUN SPARCstation 10.