DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Connectivity biased channel construction and ordering for building-block layout
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
A new algorithm for floorplan design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
On the validity of trace-driven simulation for multiprocessors
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Branch-and-bound placement for building block layout
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A genetic algorithm for macro cell placement
EURO-DAC '92 Proceedings of the conference on European design automation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
CAD Tools for Area-Distributed I/O Pad Packaging
MCMC '97 Proceedings of the 1997 Conference on IEEE Multi-Chip Module Conference
Recursive bisection based mixed block placement
Proceedings of the 2004 international symposium on Physical design
Multi-level placement for large-scale mixed-size IC designs
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
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This paper presents an approach to the automatic placement of a combination of macro blocks and standard cells. Standard cells are partitioned into flexible virtual blocks during block placement and are later placed into the target area through an integrated optimization routine. Results for a number of examples are given, including those from standard placement benchmarks.