Minimum-Area Wiring for Slicing Structures
IEEE Transactions on Computers
ORCA a sea-of-gates place and route system
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Efficient floorplan area optimization
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Canonical embedding of rectangular duals with applications to VLSI floorplanning
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
A graph theoretic technique to speed up floorplan area optimization
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
An optimal algorithm for floorplan area optimization
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Dynamic expression trees and their applications
SODA '91 Proceedings of the second annual ACM-SIAM symposium on Discrete algorithms
A near optimal algorithm for technology mapping minimizing area under delay constraints
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Parallel algorithms for slicing based final placement
EURO-DAC '92 Proceedings of the conference on European design automation
Flexible controlpath microarchitecture synthesis based on artificial intelligence
EURO-DAC '92 Proceedings of the conference on European design automation
Area minimization for hierarchical floorplans
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Rectangle-packing-based module placement
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
An optimal algorithm for area minimization of slicing floorplans
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Module placement on BSG-structure and IC layout applications
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
A performance-driven IC/MCM placement algorithm featuring explicit design space exploration
ACM Transactions on Design Automation of Electronic Systems (TODAES)
EXPLORER: an interactive floorplanner for design space exploration
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Performance driven floorplanning for FPGA based designs
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Transforming an arbitrary floorplan into a sliceable one
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Slicibility of rectangular graphs and floorplan optimization
Proceedings of the 1997 international symposium on Physical design
On convex formulation of the floorplan area minimization problem
ISPD '98 Proceedings of the 1998 international symposium on Physical design
A DSM design flow: putting floorplanning, technology-mapping, and gate-placement together
DAC '98 Proceedings of the 35th annual Design Automation Conference
Optimal aspect ratios of building blocks in VLSI
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Slicing floorplans with pre-placed modules
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Slicing floorplans with range constraint
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Area minimization for general floorplans
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
MOCSYN: multiobjective core-based single-chip system synthesis
DATE '99 Proceedings of the conference on Design, automation and test in Europe
A new algorithm for floorplan design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Floorplan area minimization using Lagrangian relaxation
ISPD '00 Proceedings of the 2000 international symposium on Physical design
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Classical floorplanning harmful?
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Slicing floorplan design with boundary-constrained modules
Proceedings of the 2001 international symposium on Physical design
Efficient list-approximation techniques for floorplan area minimization
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Slicible rectangular graphs and their optimal floorplans
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Occam Algorithms for Computing Visual Motion
IEEE Transactions on Pattern Analysis and Machine Intelligence
ViSta: a tool suite for the visualization of behavioral requirements
Journal of Systems and Software
Floorplanning of pipelined array modules using sequence pairs
Proceedings of the 2003 international symposium on Physical design
The optimisation of block layout and aisle structure by a genetic algorithm
Computers and Industrial Engineering
A Genetic Algorithm for VLSI Floorplanning
PPSN VI Proceedings of the 6th International Conference on Parallel Problem Solving from Nature
Generalized Maximum Independent Sets for Trees in Subquadratic Time
ISAAC '99 Proceedings of the 10th International Symposium on Algorithms and Computation
An Algorithmic Framework for Visualizing Statecharts
GD '00 Proceedings of the 8th International Symposium on Graph Drawing
Some Applications of Orderly Spanning Trees in Graph Drawing
GD '02 Revised Papers from the 10th International Symposium on Graph Drawing
VLSI floorplan generation and area optimization using AND-OR graph search
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
A simple yet effective genetic approach for the orientation assignment on cell-based layout
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Macro Block Based FPGA Floorplanning
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Fast Hierarchical Floorplanning with Congestion and Timing Control
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Optimal slicing of plane point placements
EURO-DAC '90 Proceedings of the conference on European design automation
Solution of a module orientation and rotation problem
EURO-DAC '90 Proceedings of the conference on European design automation
Datapath optimization using feedback
EURO-DAC '91 Proceedings of the conference on European design automation
Efficient shape curve construction in floorplan design
EURO-DAC '91 Proceedings of the conference on European design automation
Goal oriented slicing enumeration through shape function clipping
EURO-DAC '91 Proceedings of the conference on European design automation
Innovate or perish: FPGA physical design
Proceedings of the 2004 international symposium on Physical design
A Novel Geometric Algorithm for Fast Wire-Optimized Floorplanning
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Multi-Million Gate FPGA Physical Design Challenges
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Synthesis of skewed logic circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Floorplan design for multi-million gate FPGAs
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Optimal jumper insertion for antenna avoidance under ratio upper-bound
Proceedings of the 43rd annual Design Automation Conference
An approximation algorithm for dissecting a rectangle into rectangles with specified areas
Discrete Applied Mathematics
A revisit to floorplan optimization by Lagrangian relaxation
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Rectangular layouts and contact graphs
ACM Transactions on Algorithms (TALG)
Real-time minimum vertex cover for two-terminal series-parallel graphs
International Journal of High Performance Computing and Networking
DeFer: deferred decision making enabled fixed-outline floorplanner
Proceedings of the 45th annual Design Automation Conference
Fast unified floorplan topology generation and sizing on heterogeneous FPGAs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An efficient macro-cell placement algorithm
Integration, the VLSI Journal
DeFer: deferred decision making enabled fixed-outline floorplanning algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Algorithms and theory of computation handbook
Multi-stack boundary labeling problems
FSTTCS'06 Proceedings of the 26th international conference on Foundations of Software Technology and Theoretical Computer Science
A theoretical upper bound for IP-based floorplanning
COCOON'05 Proceedings of the 11th annual international conference on Computing and Combinatorics
Transformation from ad hoc EDA to algorithmic EDA
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
Optimal slack-driven block shaping algorithm in fixed-outline floorplanning
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
Hierarchical congregated ant system for bottom-up VLSI placements
Engineering Applications of Artificial Intelligence
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