Optimal orientations of cells in slicing floorplan designs
Information and Control
Efficient floorplan area optimization
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Canonical embedding of rectangular duals with applications to VLSI floorplanning
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
A new algorithm for floorplan design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A linear algorithm to find a rectangular dual of a planar triangulated graph
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Optimizing decision trees through heuristically guided search
Communications of the ACM
Inherent Nonslicibility of Rectangular Duals in VLSI Floorplanning
Proceedings of the Eighth Conference on Foundations of Software Technology and Theoretical Computer Science
Problem-Solving Methods in Artificial Intelligence
Problem-Solving Methods in Artificial Intelligence
A unified approach to floorplan sizing and enumeration
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A unified approach to topology generation and area optimization of general floorplans
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Slicibility of rectangular graphs and floorplan optimization
Proceedings of the 1997 international symposium on Physical design
Slicible rectangular graphs and their optimal floorplans
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Geometric bipartitioning problem and its applications to VLSI
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Algorithms for generating ordered solutions for explicit and/or structures
Journal of Artificial Intelligence Research
| Hi-index | 0.00 |
Floorplan design based on rectangular dualization is considered in two phases. First, given the adjacency graph and sets of aspect ratios of the blocks, a topology is generated which is likely to yield a minimum-area floorplan during the second phase of optimal sizing. Since the problem of finding such topology seems to be intractable, a heuristic search method using AND-OR graphs is employed in the top-down first phase. Novel heuristic estimates are used to reduce the search effort. For slicing topologies, a bottom-up polynomial-time algorithm is used to solve the second phase. Moreover, the first phase is able to report inherently nonslicible floorplans. The proposed method outperforms the existing techniques, as evident from the experimental results.