A unified approach to topology generation and area optimization of general floorplans

Authors:
Partha S. Dasgupta;Susmita Sur-Kolay;Bhargab B. Bhattacharya
Affiliations:
Computer Center, Indian Institute of Management, Calcutta 700 027, India;Dept. of CSE, Jadavpur University, Calcutta 700 032, India;Electronics Unit, Indian Statistical Institute, Calcutta 700 035, India
Venue:
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Year:
1995

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Abstract

In this paper, it is shown that for any rectangularly dualizable graph, a feasible topology can be obtained by using only either straight or Z-cutlines recursively within a bounding rectangle. Given an adjacency graph, a potential topology, which may be nonslicible and is likely to yield an optimally sized floorplan, is produced first in a top-down fashion using heuristic search in AND-OR graphs. The advantage of this technique is fourfold : (i) accelerates top-down search phase, (ii) generates a floorplan with minimal number of nonslice cores, (iii) ensures safe routing order without addition of pseudo-modules, and (iv) solves the bottom-up algorithm efficiently for optimal sizing of general floorplans in the second phase.