Optimal orientations of cells in slicing floorplan designs
Information and Control
Rectangle-packing-based module placement
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Module placement on BSG-structure and IC layout applications
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
An O-tree representation of non-slicing floorplan and its applications
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A new algorithm for floorplan design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
An enhanced perturbing algorithm for floorplan design using the O-tree representation
ISPD '00 Proceedings of the 2000 international symposium on Physical design
B*-Trees: a new representation for non-slicing floorplans
Proceedings of the 37th Annual Design Automation Conference
Future Generation Computer Systems
Slicing tree is a complete floorplan representation
Proceedings of the conference on Design, automation and test in Europe
MMP: a novel placement algorithm for combined macro block and standard cell layout design
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
FAST-SP: a fast algorithm for block placement based on sequence pair
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
TCG: a transitive closure graph-based representation for non-slicing floorplans
Proceedings of the 38th annual Design Automation Conference
Floorplanning with abutment constraints and L-shpaed/T-shaped blocks baed on corner block list
Proceedings of the 38th annual Design Automation Conference
Global clustering-based performance-driven circuit partitioning
Proceedings of the 2002 international symposium on Physical design
Corner block list: an effective and efficient topological representation of non-slicing floorplan
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
The Ant System Applied to the Quadratic Assignment Problem
IEEE Transactions on Knowledge and Data Engineering
Multilevel floorplanning/placement for large-scale modules using B*-trees
Proceedings of the 40th annual Design Automation Conference
DAC '82 Proceedings of the 19th Design Automation Conference
An Enhanced Q-Sequence Augmented with Empty-Room-Insertion and Parenthesis Trees
Proceedings of the conference on Design, automation and test in Europe
Performance Driven Circuit Clustering and Partitioning
ITCC '02 Proceedings of the International Conference on Information Technology: Coding and Computing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Practical slicing and non-slicing block-packing without simulated annealing
Proceedings of the 14th ACM Great Lakes symposium on VLSI
ACG-Adjacent Constraint Graph for General Floorplans
ICCD '04 Proceedings of the IEEE International Conference on Computer Design
Ant colony system application to macrocell overlap removal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Are floorplan representations important in digital design?
Proceedings of the 2005 international symposium on Physical design
Ant Algorithms: Theory and Applications
Programming and Computing Software
Floorplanning for 3-D VLSI design
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Fixed-outline floorplanning using robust evolutionary search
Engineering Applications of Artificial Intelligence
A Novel Ant Colony Optimization Based Temperature-Aware Floorplanning Algorithm
ICNC '07 Proceedings of the Third International Conference on Natural Computation - Volume 04
VLSID '08 Proceedings of the 21st International Conference on VLSI Design
DeFer: deferred decision making enabled fixed-outline floorplanning algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fixed-outline floorplanning: enabling hierarchical design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Placement constraints and macrocell overlap removal using particle swarm optimization
ANTS'06 Proceedings of the 5th international conference on Ant Colony Optimization and Swarm Intelligence
Ant colony system: a cooperative learning approach to the traveling salesman problem
IEEE Transactions on Evolutionary Computation
IEEE Transactions on Evolutionary Computation
Ant system: optimization by a colony of cooperating agents
IEEE Transactions on Systems, Man, and Cybernetics, Part B: Cybernetics
GALLO: a genetic algorithm for floorplan area optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
VLSI module placement based on rectangle-packing by the sequence-pair
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimal partitioners and end-case placers for standard-cell layout
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Floorplanning using a tree representation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Handling soft modules in general nonslicing floorplan using Lagrangian relaxation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Twin binary sequences: a nonredundant representation for general nonslicing floorplan
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Bounds on the number of slicing, mosaic, and general floorplans
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hierarchical whitespace allocation in top-down placement
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Simultaneous Floor Planning and Global Routing for Hierarchical Building-Block Layout
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
TCG-S: orthogonal coupling of P*-admissible representations for general floorplans
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fast floorplanning by look-ahead enabled recursive bipartitioning
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimal floorplan area optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A New Multilevel Framework for Large-Scale Interconnect-Driven Floorplanning
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fixed-Outline Floorplanning: Block-Position Enumeration and a New Method for Calculating Area Costs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Area minimization for floorplans
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A Hybrid Simulated Annealing Algorithm for Nonslicing VLSI Floorplanning
IEEE Transactions on Systems, Man, and Cybernetics, Part C: Applications and Reviews
Variable-Order Ant System for VLSI multiobjective floorplanning
Applied Soft Computing
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A new perturbation method, called Hierarchical-Congregated Ant System (H-CAS) has been proposed to perform the variable-order bottom-up placement for VLSI. H-CAS exploits the concept of ant colonies, where each ant will generate the perturbation based on differences in dimensions of the VLSI modules in hard modules floorplanning and differences in area of the VLSI modules in soft modules floorplanning. In this paper, it is mathematically proved that the area-based two-dimensional cost function for hard modules floorplanning problem can be reduced to the difference-based one dimensional cost function which avoids local optima problems. Lack of global view is a major drawback in the conventional bottom-up hierarchy, and hence, ants in the H-CAS are made to introduce global information at every level of bottom-up hierarchy. A new relative whitespace formula for bottom-up hierarchy is derived mathematically and the H-CAS embeds it in its unique update formula. The ants in H-CAS are able to communicate among themselves and update the pheromone trails when they reach the destination. Then, the ants will congregate, share their experiences and construct a new pheromone trails that belong to this newly constructed group. The congregation of at least two ants and/or ant consortiums would lead to reduction in subsequent search space and complexity. H-CAS gives the best-so-far near optimal solutions and yields low standard deviations of areas involving 9-600 blocks based on Microelectronics Center of North Carolina (MCNC) and Giga scale Systems Research Center (GSRC) benchmarks. The results obtained establish that H-CAS is a high performance placer in respect of scaling, convergence, precision, stability, and reliability. The above claims are based on the comparisons with the other floorplanning algorithms as depicted graphically.