Multilevel floorplanning/placement for large-scale modules using B*-trees

  • Authors:
  • Hsun-Cheng Lee;Yao-Wen Chang;Jer-Ming Hsu;Hannah H. Yang

  • Affiliations:
  • Synopsys Inc., Taipei, Taiwan;National Taiwan University, Taipei, Taiwan;National Center for High-Performance Computing, Hsinchu, Taiwan;Strategic CAD Labs, Intel Corporation, Hillsboro, OR

  • Venue:
  • Proceedings of the 40th annual Design Automation Conference
  • Year:
  • 2003

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Abstract

We present in this paper a multilevel floorplanning/placement framework based on the B*-tree representation, called MB*-tree, to handle the floorplanning and packing for large-scale building modules. The MB*-tree adopts a two-stage technique, clustering followed by declustering. The clustering stage iteratively groups a set of modules based on a cost metric guided by area utilization and module connectivity, and at the same time establishes the geometric relations for the newly clustered modules by constructing a corresponding B*-tree for them. The declustering stage iteratively ungroups a set of the previously clustered modules (i.e., perform tree expansion) and then refines the floorplanning/placement solution by using a simulated annealing scheme. In particular, the MB*-tree preserves the geometric relations among modules during declustering, which makes the MB*-tree an ideal data structure for the multilevel floorplanning/placement framework. Experimental results show that the MB*-tree obtains significantly better silicon area and wirelength than previous works. Further, unlike previous works, MB*-tree scales very well as the circuit size increases.