A polynomial-time optimization algorithm for a rectilinear partitioning problem with applications in VLSI design automation

Authors:
Maharaj Mukherjee;Kanad Chakraborty
Affiliations:
EDA Laboratory, IBM Microelectronics, 2070 Rte 52, East Fishkill, NY 12533, USA;Circuits and Systems Research Laboratory, Agere Systems, 600-700 Mountain Avenue, Murray Hill, NJ 07974, USA
Venue:
Information Processing Letters
Year:
2002

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