Analytical Model for Sensor Placement on Microprocessors

  • Authors:
  • Kyeong-Jae Lee;Kevin Skadron;Wei Huang

  • Affiliations:
  • Departments of Computer Science, and Electrical and Computer Engineering, University of Virginia;Departments of Computer Science, and Electrical and Computer Engineering, University of Virginia;Departments of Computer Science, and Electrical and Computer Engineering, University of Virginia

  • Venue:
  • ICCD '05 Proceedings of the 2005 International Conference on Computer Design
  • Year:
  • 2005

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Abstract

Thermal management in microprocessors has become a major design challenge in recent years. Thermal monitoring through hardware sensors is important, and these sensors must be carefully placed on the chip to account for thermal gradients. In this paper, we present an analytical model that describes the maximum temperature differential between a hot spot and a region of interest based on their distance and processor packaging information. We also use a runtime thermal model, as an illustration of virtual sensors, and examine two benchmarks that exhibit highly concentrated thermal stress. We then use our analytical model to demonstrate the safety margins of the chip. Ultimately, the mathematical expression allows designers to obtain worstcase behavior of thermal heatup and select the optimal location of additional sensors.