Fast hypergraph partition

  • Authors:
  • A. B. Kahng

  • Affiliations:
  • Department of Computer Science, University of California, San Diego, La Jolla, CA

  • Venue:
  • DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
  • Year:
  • 1989

Quantified Score

Hi-index 0.00

Visualization

Abstract

We present a new &Ogr;(n2) heuristic for hypergraph min-cut bipartitioning, an important problem in circuit placement. Fastest previous methods for this problem are &Ogr;(n2 log n). Our approach is based on the intersection graph G dual to the input hypergraph. Paths in G are used to construct partial bipartitions which can be completed optimally. The method is provably good and, in particular, obtains optimum results for “difficult” inputs, i.e., hypergraphs with smaller than expected minimum cutsize. Computational results for a wide range of inputs are also discussed.