The ISPD98 circuit benchmark suite
ISPD '98 Proceedings of the 1998 international symposium on Physical design
A linear-time heuristic for improving network partitions
DAC '82 Proceedings of the 19th Design Automation Conference
| Hi-index | 0.00 |
In this paper, we describe the FM algorithm for partitioning a graph/hypergraph. We implement the algorithm for ISPD98 standard benchmark VLSI circuits and show the linear relationship between the size of the hypergraph and running time of the algorithm. We further propose a modified FM algorithm in the form of one -- way FM and early exit FM applicable specifically to large VLSI circuits to improve the performance of the FM algorithm. Several parameters like cut count, sum of external degree, scaled cost and absorption are measured by running each of the algorithms viz. FM, one -- way FM and early exit FM for the different benchmark circuits. The proposed algorithms are found to be performing much better than the standard FM algorithm. Early exit FM algorithm in particular is showing much improvement with respect to the above mentioned parameters. The proposed schemes are also extended to the k -- way partitioning problem and the above mentioned parameters are measured to show the improvement in performance and the quality of solution by applying the one --way FM and the early exit schemes.