Parallel implementations of the statistical cooling algorithm
Integration, the VLSI Journal
Multiprocessor-based placement by simulated annealing
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A linear-time heuristic for improving network partitions
DAC '82 Proceedings of the 19th Design Automation Conference
An efficient simulated annealing schedule
An efficient simulated annealing schedule
VLSI cell placement techniques
ACM Computing Surveys (CSUR)
Stochastic evolution: a fast effective heuristic for some generic layout problems
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A loosely coupled parallel algorithm for standard cell placement
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Synthesis of manufacturable analog circuits
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
ASTRX/OBLX: tools for rapid synthesis of high-performance analog circuits
DAC '94 Proceedings of the 31st annual Design Automation Conference
Multiple FPGA partitioning with performance optimization
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
Efficient and effective placement for very large circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
A hardware/software partitioner using a dynamically determined granularity
DAC '97 Proceedings of the 34th annual Design Automation Conference
A hierarchical decomposition methodology for multistage clock circuits
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
A stochastic approach to the bin-packing problem
SAC '94 Proceedings of the 1994 ACM symposium on Applied computing
Runtime and quality tradeoffs in FPGA placement and routing
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Automatic Partitioning for Improved Placement and Routing in Complex Programmable Logic Devices
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Parallel simulated annealing strategies for VLSI cell placement
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Towards a global solution to high level synthesis problems
EURO-DAC '90 Proceedings of the conference on European design automation
Architecture-adaptive range limit windowing for simulated annealing FPGA placement
Proceedings of the 42nd annual Design Automation Conference
SBCCI '06 Proceedings of the 19th annual symposium on Integrated circuits and systems design
An effective two-stage simulated annealing algorithm for the minimum linear arrangement problem
Computers and Operations Research
Simulated Annealing In The Optimization Of Collaborative Systems Operation
Journal of Integrated Design & Process Science
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Reconfigurable Computing: The Theory and Practice of FPGA-Based Computation
Effect of the prefabricated routing track distribution on FPGA area-efficiency
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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A new simulated annealing schedule has been developed; its application to the standard cell placement and the traveling salesman problems results in a two to twenty-four times speedup over annealing schedules currently available in the literature. Since it uses only statistical quantities, the annealing schedule is applicable to general combinatorial optimization problems.